Job Details:
Job Description: ISCP MIP MYS is seeking Mixed-signal design engineers to join our talented and vibrant team. You will be directly involved in delivering next-generation LPDDR6/DDR6 PHY or Die2Die Interconnects PHY designs for SOC application on Intel leading process node.
Key Responsibilities include but not limited to:
� Design and development of mixed-signal circuits such as High Speed TX and RX, Various type of compensation circuitry, equalizers, DLL, clocking circuitry such as duty cycle detection/correction, on die voltage regulators, DAC, ADC, Voltage references, powergates, powergood, high speed level shifter, ESD/Clamps and View observation circuitry.
� Own design verification plans covering functional, performance and reliability meeting high volume manufacturing requirement.
� Participate in circuit design review, reporting circuit validation results, preparing circuit constraint through CCM as guideline for Mask Designers on layout implementation and floorplan review, reliability results review and audit with QRE
� Responsible on collateral generation such as Integration Guide, Timing model, Noise model, RTL/BMOD model, Power data, IBIS model, ICCT profile, RV report on circuits being owned and ensuring quality through central QA run which ensure consistency across all collaterals being generated before handoff to another team
� Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues. Optimizes performance, power, area, and reduces leakage of circuits. Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.
Qualifications:Preferred Qualification:
� Good understanding of IC design for yield, fabrication and production challenges
� Expose to industry EDA standard tools for analog design such as Cadence ADE, Spectre, AMS verification, FEV, StarRC etc.
� Strong written and oral communication skills
� BSEE with relevant education syllabus focus should include integrated circuit design and fabrication process
Job Type:College Grad
Shift:Shift 1 (Malaysia)
Primary Location: Malaysia, Penang
Additional Locations:
Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.
Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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