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The Role
Design and optimize high-performance compute kernels for AI primitives (GEMM, attention, convolution), profile and tune across heterogeneous hardware, collaborate with compiler/runtime teams (Triton, PyTorch, SYCL), prototype precision formats, and contribute micro-architecture feedback while writing reusable C++/CUDA/Triton/MLIR code.
Summary Generated by Built In
Description
- Design and implement high-performance compute kernels for AI primitives such as GEMM, attention, normalization, and convolution.
- Optimize for throughput, latency, and memory hierarchy across heterogeneous compute units (SIMD, matrix engines, DMA).
- Collaborate with compiler and runtime teams to integrate kernels into Triton, PyTorch, or SYCL pipelines.
- Profile and tune kernels using tools like Perfetto, VTune, Tracy, or custom simulators.
- Prototype and evaluate precision formats (FP16/BF16/FP8/e5m2, etc.) and stochastic rounding.
- Contribute to micro-architecture feedback loops, helping co-design ISA and memory features with the hardware team.
- Write clear, well-structured, and reusable code (C++/CUDA/Triton/LLVM MLIR).
- Bachelor's or Master's in Computer Science, Computer Engineering, or a related field from a recognized university.
- Strong background in parallel programming (CUDA, Triton, SYCL, OpenCL, Metal, POSIX Threads, or OpenMP).
- Experience with optimization of irregular algorithms, such as graph computations or sparse numerical linear algebra, combining high-level data structure design with low-level SIMD and synchronization optimizations.
- Deep understanding of memory layout, vectorization, thread/block scheduling, and cache behavior.
- Proficiency in C++11 or higher, with strong knowledge of standard algorithms, data structures, and generic programming paradigms.
- Experience with code generation for high-performance computations and knowledge of frameworks like BLAS/BLIS/Torch
- Skilled in performance analysis and parallel debugging using tools such as Valgrind, GNU Debugger, or CI testing frameworks.
- Hands-on experience profiling and optimizing compute or AI workloads (e.g., GEMM, softmax, attention).
- Solid grasp of numerical stability, precision formats, and mixed precision arithmetic.
- Collaborative work style with the ability to operate effectively in multicultural, cross-disciplinary environments.
Skills Required
- Bachelor's or Master's in Computer Science, Computer Engineering, or related field
- Strong background in parallel programming (CUDA, Triton, SYCL, OpenCL, Metal, POSIX Threads, OpenMP)
- Experience implementing high-performance kernels in C++, CUDA, Triton, or LLVM MLIR
- Experience optimizing irregular algorithms (graph computations, sparse numerical linear algebra)
- Deep understanding of memory layout, vectorization, thread/block scheduling, and cache behavior
- Proficiency in C++11 or higher and generic programming paradigms
- Experience with code generation for high-performance computations and knowledge of BLAS/BLIS/Torch
- Skilled in performance analysis and parallel debugging using Valgrind, GDB, CI testing frameworks
- Hands-on experience profiling and optimizing compute or AI workloads (GEMM, softmax, attention)
- Solid grasp of numerical stability, precision formats, and mixed precision arithmetic (FP16/BF16/FP8/e5m2)
- Collaborative work style; ability to work effectively in multicultural, cross-disciplinary teams
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The Company
What We Do
Majestic Labs is reimagining AI infrastructure for the world’s most demanding workloads. Today, organizations are forced to overprovision expensive compute just to access the required memory their models need. We took a fundamentally different approach by pairing a massive amount of compute with 1000x the memory to create game changing improvements in performance, power and deployment efficiency. Our customers can literally replace racks of traditional AI infrastructure with a single Majestic server.
