Custom IC / Analog / RF design, Account Technical Executive for HPC accounts

Reposted One Month Ago
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San Jose, CA, USA
In-Office
248K-372K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Partner with strategic account sales teams to solve complex electronics and IC/system design challenges. Provide technical leadership using EDA and CAE tools for electromagnetic, thermal, PCB/module, and IC design analyses. Advise on architectures, integration, packaging, and trade-offs to optimize size, power, cost, and quality. Build and grow customer relationships, align roadmaps, and translate customer pain points into Cadence solutions.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Account Technical Executive (ATX) – Custom IC / Analog / RF (Virtuoso Platform)

At Cadence, we hire and develop leaders and innovators who want to make a meaningful impact on the future of semiconductor design.

Position Overview

As an Account Technical Executive (ATX) focused on Custom IC / Analog / RF design, you will serve as the primary technical leader driving adoption and value realization of the Cadence Virtuoso Platform, including Virtuoso Layout Suite and associated Custom IC design flows.

You will partner closely with strategic sales teams and key customer stakeholders (design leads, CAD teams, and methodology owners) to solve complex custom IC design challenges, with a strong emphasis on layout implementation, analog and mixed-signal productivity, and advanced-node methodologies.

This role also plays a key part in driving next-generation design methodologies by leveraging AI-driven and agent-based workflows, helping customers adopt intelligent automation frameworks that enhance productivity, design quality, and time-to-market.

Key Responsibilities

  • Lead technical engagement for Custom IC / Analog / RF design flows, with a primary focus on Virtuoso Layout Suite and the broader Virtuoso platform
  • Partner with customer design and CAD teams to optimize layout productivity, quality, and time-to-market
  • Drive adoption of advanced capabilities such as:
    • Constraint-driven and automation-assisted layout
    • Device-level and full-chip layout methodologies
    • Advanced node layout challenges (FinFET, GAA)
    • EM and IR-aware layout and parasitic extraction flows
  • Champion the integration of AI-driven design techniques, including:
    • Agentic AI workflows to automate design exploration, layout optimization, and verification tasks
    • AI-assisted decision-making for layout trade-offs including PPA, matching, and parasitics
  • Translate customer pain points into actionable requirements for R&D and product engineering
  • Provide technical leadership in methodology definition, flow development, and best practices
  • Influence competitive replacements and expand footprint of Cadence Custom IC solutions
  • Support executive-level discussions by linking technical value such as PPA, productivity, and risk reduction to business outcomes

Key Qualifications (Custom IC / Virtuoso + AI Focus)

Custom IC and Virtuoso Expertise

  • Deep hands-on experience with the Cadence Virtuoso Platform, including:
    • Virtuoso Layout Suite (XL, GXL, EXL)
    • Schematic-driven layout and LVS flows
    • DRC and physical verification integration
  • Strong knowledge of custom analog and mixed-signal layout techniques, including:
    • Device matching, symmetry, common centroid, and shielding
    • Parasitic-aware layout for high-performance analog and RF circuits
  • Experience with the Spectre simulation environment and layout-to-schematic integration
  • Familiarity with PCell development, layout automation, and scripting (SKILL preferred)

Agentic AI and Intelligent Design Automation

  • Strong understanding of AI and machine learning applications in semiconductor design, specifically:
    • Agentic AI frameworks such as multi-agent systems, goal-driven automation, and autonomous optimization
    • AI-assisted layout generation and design space exploration
    • Intelligent automation of repetitive design and verification tasks
  • Experience or demonstrated interest in:
    • Applying AI to EDA workflows, CAD flows, or design methodology optimization
    • Working with data-driven or reinforcement learning-based optimization approaches
  • Ability to bridge AI innovation with practical design flows, translating emerging technologies into deployable customer solutions

Design and Methodology Expertise

  • 5–10 or more years of experience in:
    • Custom IC, Analog, or RF design or layout engineering
    • Mixed-signal design flows at block and full-chip level
  • Deep understanding of:
    • Analog and RF design flows from schematic to signoff
    • Physical verification, extraction, and post-layout simulation
    • Advanced-node layout challenges and reliability considerations
  • Experience with layout productivity optimization and methodology deployment at scale

Customer Engagement and Leadership

  • Proven ability to:
    • Engage deeply with CAD teams, design leads, and senior technical leadership
    • Identify and articulate technical gaps and business impact
    • Drive alignment between customer roadmap and Cadence product direction
  • Strong communication skills with the ability to translate between deep technical detail and executive-level value

Position Requirements

  • BSEE required, MSEE or higher strongly preferred
  • 5–10 or more years of experience in Custom IC, Analog, or RF design or layout
  • Demonstrated expertise in Virtuoso-based design environments
  • Exposure to or strong interest in AI-driven design methodologies and agent-based automation frameworks
  • Strong collaboration and customer-facing experience
  • Ability to travel approximately 25 percent, primarily within North America

Location

San Jose

The annual salary range for California is $248,000 to $372,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • BSEE degree
  • MSEE highly desirable
  • 5-10 years mixed-signal and/or custom IC engineering experience
  • Familiarity with EDA tools and the semiconductor/module/board manufacturing ecosystem
  • Fluent user of CAE systems including Matlab, Ansys, ADS, Virtuoso, and Spectre
  • Experience with multi-physics simulation and system thermal analysis
  • Deep understanding of electronics systems, heterogeneous integration, and advanced packaging
  • Understanding of MBSE, digital twins, and agile development practices
  • Strong time management, communication, and customer-facing collaboration skills
  • Ability to travel up to 25% (mainly Western North America)

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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