3D Heterogeneous Integration Design Enablement Engineer (2026 New College Graduate)

About GlobalFoundries:  

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.  

Summary of Role: 

GlobalFoundries Fab8 is seeking a motivated R&D design enablement engineer to become part of our state-of-the-art 300mm fabrication facility in Malta, New York.  This role will entail 3D heterogeneous integration (3DHI) design enablement to enable our next-generation advanced packaging R&D efforts, which include wafer-to-wafer bonding, die-to-wafer bonding, TSV/TOV and interposer development. 

Essential Responsibilities:  

• Publish Design Manual (DM) specifications based on failure modes identified for packaging required by the product lines in partnership with the unit process and R&D engineers. 

• DM is a collection of all technology restrictions (geometry rules, electrical rules, etc.) that must be followed for an integrated circuit (IC) design to be manufacturable. 

• Advanced packaging liaison to the DM and PDK (Process Design Kit) teams to translate packaging requirements to a device enablement specification covering: design rules, library device(TSV) layouts, layout vs schematic(LVS) requirements, device model terminals. 

• Develop expertise in drafting test vehicle content specifications and the associated tapeout process (including mask reviews). 

• Develop expertise in drafting test specifications for test vehicle content (macros); engage with the test teams (inline and lab) to ensure alignment on test requests. 

• Collaborate with vendors and OSATs (Outsourced Assembly and Test) on design (test vehicles, masks). 

• Facilitate advanced packaging design interactions between the product lines/fab teams and customers. 

• Work and collaborate with other teams regarding different assignments as needed. 

Other Responsibilities:  

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.  

• Other duties as assigned by manager.  

Required Qualifications:  

• Education – PhD with completed defended thesis or Master's in Electrical Engineering and Materials Science or related field from an accredited degree program.  

• Must have at least an overall 3.0 GPA and proven good academic standing.  

• Language Fluency - English (Written & Verbal).  

• Travel - Up to 10%.  

Preferred Qualifications:  

• Prior-related internship or co-op experience in design or EDA/design enablement 

• Fundamental knowledge of semiconductor packaging process modules and integration. 

• Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.   

• Project management skills, i.e. the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.    

• Strong written and verbal communication skills. 

• Strong planning & organizational skills.  

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