Teams at TAP Engineering

The role involves supporting HPC environments, integrating software, troubleshooting, and ensuring operational performance in a 24/7 setting.

Responsible for software integration and support of HPC systems, leading transitions into operations, and providing technical leadership.

Lead technical strategy for a government microelectronics modernization effort, defining secure cloud-enabled design environments, IP governance, and SoC/FPGA design workflows. Evaluate toolchains, foundry-qualified flows, and advanced packaging; produce technical assessments, guide architecture decisions, and coordinate stakeholders across government, industry, and research partners to accelerate semiconductor development and reuse.