Teams at SiTime

Lead analog mixed-signal circuit and chip development for precision timing products. Define architectures, perform transistor-level design and simulations, supervise designers and layout, run post-layout extraction and Monte Carlo analysis, collaborate across teams for DFT/DFM and silicon bring-up, and drive validation, characterization, and production release.

Design and verify analog and mixed-signal circuits to meet specifications, contribute to architecture and chip integration, collaborate on layout and DFT/DFM, support bring-up, evaluation and characterization, and work cross-functionally with product, test, and application teams.

Lead chip-level planning and perform block- and leaf-cell custom layouts for CMOS/BiCMOS circuits. Drive floorplanning, power/shielding, verify DRC/LVS/ERC, support chip integration and tape-out, train junior and offshore layout engineers, and develop cross-site layout methodologies and processes.