Teams at Samsung Semiconductor, Inc.

Lead verification for AI accelerator IP blocks, developing UVM-based testbenches, automation, simulations, regressions, test plans, and quality metrics. Collaborate with architects, RTL, compiler, and simulation engineers to debug failures and validate functionality and performance across IP, die, SoC, and system levels. Document verification strategies, improve test environments, and mentor junior engineers.

Build a cost-model-guided auto-tuning framework for PyTorch and Triton kernels on a compute-near-memory AI accelerator. Responsibilities include designing search spaces, legality rules, cost models, benchmarking harnesses, tuning caches, and integrations with torch.compile, Inductor, and Triton. The intern will measure LLM inference performance, support data-placement-aware tuning, collaborate with compiler and open-source teams, and deliver tested, documented code and results.

Build AgentSysBench benchmarks and profiling tools for AI agent frameworks and LLM serving workloads. Develop runtime adapters, workload benchmarks, and trace replay systems; profile CPU, memory, GPU, and accelerator performance; measure DDR5, HBM, and CXL bandwidth and latency; evaluate KV-cache sharing and memory expansion; develop memory tiering cost models; and present findings to the team.