Teams at Quadric

Own customer technical evaluations through design wins by porting and optimizing workloads on Quadric’s Chimera GPNPU. Responsibilities include profiling performance, writing custom kernels, supporting quantization and compiler tooling, debugging with customer engineering teams, and guiding model architecture tradeoffs. The role also develops reusable SDK skills, porting playbooks, benchmark applications, and agentic FDE workflows while relaying customer feedback to engineering and product teams.

Support SoC subsystem development, third-party IP integration, and power, performance, and area optimization for Quadric’s edge AI processor. Assist with low-power digital design, timing closure, architecture documentation, debugging, and front-end RTL development using SystemVerilog or Verilog while collaborating with SoC architects and hardware designers.

Own customer evaluations through design wins by porting and optimizing workloads on Quadric’s Chimera GPNPU. Develop custom kernels, profile performance, debug customer implementations, and guide model architecture tradeoffs. Build reusable SDK skills, porting playbooks, benchmark applications, and agentic FDE tooling. Collaborate with engineering and product teams to incorporate customer feedback into the roadmap.