Teams at Powerlattice Inc

Develop embedded C firmware, device drivers, board-support packages, and Python-based validation frameworks for power delivery chiplets. Build automation, regression systems, databases, GUIs, and customer debug tools. Support silicon bring-up, lab instrumentation, hardware interface debugging, and system-level validation while collaborating with hardware, firmware, and silicon design teams.

Lead digital and mixed-signal SoC verification from RTL through gate-level simulation. Responsibilities include architecting SystemVerilog and UVM environments, developing constrained-random tests, assertions, coverage, regression and GLS flows, debugging failures, verifying protocols and clock domains, driving coverage closure, and mentoring verification engineers. The role collaborates with RTL, analog, architecture, and silicon validation teams to resolve design issues and achieve verification signoff.

Lead laboratory evaluation and debugging of chiplet power converters for key customer accounts. Develop testing, identify root causes, document findings, create application notes and operating guides, support conference collateral, assist project scheduling, and guide team members in resolving customer issues. The role requires extensive integrated-circuit applications engineering experience, Python-based lab automation, electronics laboratory expertise, customer problem-solving, and silicon bring-up and post-silicon debugging.