Teams at Positron AI

The Senior Software Engineer will develop high-performance software for executing open-source LLMs on custom hardware, focusing on optimizations and efficient libraries primarily in C++.

As an ASIC Design Verification Engineer, you will develop and execute verification strategies for AI inference ASICs, ensuring functional correctness and performance, while collaborating with design and architecture teams.

Lead pre-silicon emulation strategy for a next-generation AI inference ASIC using Cadence Palladium. Architect multi-rack models, enable software left-shift via hybrid emulation, verify high-speed interfaces and memory hierarchies, perform power/performance analysis, and collaborate with RTL, DV, software teams and Cadence R&D to ensure silicon readiness.