Teams at Persimmons, Inc.

Lead ASIC verification for an AI inference chiplet from subsystem through full-chip validation. Build UVM testbenches, constrained-random tests, reference models, scoreboards, and coverage-driven verification flows. Develop C/C++ tests on RISC-V, apply formal verification, support FPGA prototyping on Synopsys HAPS, automate regressions, and use AI workflows for test generation, triage, log analysis, and coverage closure.

The RTL/PD Engineer handles RTL-to-PD handoffs, timing closure, floorplanning, and creates automated design flows, collaborating with various teams for seamless integration and quality checks.

Leads end-to-end chip and systems engineering programs from kickoff through tape-out and launch. Coordinates hardware, software, firmware, validation, manufacturing, vendors, foundries, and contract manufacturers. Maintains schedules, milestones, dependencies, dashboards, risks, mitigation plans, and resource visibility while resolving blockers and communicating program health to engineering leadership.