Teams at Persimmons, Inc.

The RTL/PD Engineer handles RTL-to-PD handoffs, timing closure, floorplanning, and creates automated design flows, collaborating with various teams for seamless integration and quality checks.

Lead the development of a compiler for AI models, optimizing performance and collaborating across teams while mentoring engineers.

The Senior ASIC Design Verification Engineer leads verification planning and execution for AI chip designs, collaborates with cross-functional teams, and innovates verification methodologies.