Jobs at NextSilicon

Administer and maintain large-scale HPC/AI environments, including compute, storage, networking, software stacks, and Slurm scheduling. Develop automation for provisioning, configuration, and monitoring; optimize systems for benchmarking, capacity planning, and performance. Support security patching, troubleshooting, application deployment, researcher support, documentation, vendor coordination, procurement, and lifecycle management. This remote or hybrid individual contributor role requires approximately four domestic trips annually and U.S. citizenship for access to government research facilities.

Provides broad commercial legal counsel for complex technology transactions, licensing, partnerships, cloud and public-sector agreements. Negotiates contracts, supports RFPs and tenders, advises on privacy, data protection, AI regulation, open-source compliance, and international operations. Establishes scalable legal processes, policies, templates, and approval frameworks while coordinating external counsel. Uses generative AI tools to streamline legal workflows and provides practical guidance to senior leadership and business teams.

Drive software platform development across drivers, runtime, compiler, and SDK layers. Establish technical vision and product roadmaps, lead cross-functional planning and delivery, manage dependencies, risks, reporting, and project execution, improve development processes and methodologies, and support New Product Introduction. The role partners with software leaders to deliver HPC and AI technologies.

Lead the architecture and execution of next-generation HPC and AI chips. Manage managers and technical leads while remaining hands-on in architectural decisions, system-level design, technical execution, milestone delivery, and cross-functional collaboration with software, architecture, verification, and backend engineering teams. Build group expertise, define execution indicators, monitor progress, and support prioritization and decision-making.

Lead the architecture and execution of future high-performance computing and AI chips. Manage managers and technical leads while remaining hands-on in system-level architecture, technical decisions, milestone delivery, and front-end design analysis. Translate requirements into specifications, guide high-speed and low-power digital design, build team expertise, collaborate with software, verification, architecture, and back-end teams, and monitor execution indicators to support prioritization and decision-making.

Develop, optimize, and productionize mathematical algorithms for a general-purpose coprocessor. Explore graph theory and clustering approaches, analyze application code and performance data, and collaborate cross-functionally to translate research into practical high-performance computing solutions.

Develop and optimize compiler analyses and transformations for an adaptive runtime targeting NextSilicon hardware. Contribute to MLIR/LLVM upstream, benchmark HPC applications, identify optimization opportunities, and collaborate with software, HPC application, and hardware teams to improve performance.

Design, implement, test, and maintain high- and low-level compiler optimizations and analyses for HPC applications on custom hardware. Contribute to upstream MLIR/LLVM, benchmark applications, identify optimization opportunities, and collaborate with software, hardware, and application teams to drive runtime compiler performance.

Design, implement, test, and maintain high- and low-level compiler optimizations and analyses for HPC applications on specialized hardware. Contribute to upstream MLIR and LLVM, develop an adaptive runtime compiler, benchmark applications to identify optimization opportunities, and collaborate with software, HPC, and hardware teams.

The Senior Logic Design Engineer will design advanced blocks for chips, transform architectural requirements into specifications, and optimize power while collaborating with teams on execution.

As an AI Workloads Engineer, you'll model AI workflows on NextSilicon hardware, run open-source systems, and drive performance improvements.

Develop a compiler stack for parallel frameworks and improve NextSilicon's software stack by collaborating with multiple teams.

The engineer will optimize AI libraries and components for unique hardware, focusing on performance improvements in AI models and kernels.

The AI Compiler Engineer will develop the AI graph compiler and work on the software stack to optimize AI models for unique hardware architecture. Responsibilities include enhancing performance for AI models and contributing to related components in the software stack.

Lead the design of advanced RISC-V CPU ASICs, drive execution across teams, and ensure successful tape-out and product bring-up. Requires 6+ years experience in ASIC design.

The Emulation Engineer will develop emulation models for NextSilicon accelerators, optimizing for speed and collaborating with various teams to ensure performance goals are met.

Lead the verification efforts for NextSilicon's core product, building a complex verification environment, defining test plans, and ensuring product quality through collaboration with various teams.

Profile and optimize HPC applications across architectures; identify bottlenecks, develop algorithmic and software solutions to accelerate workloads, translate application needs into software/hardware features, and build performance models for future architectures.

Lead porting and performance analysis of diverse HPC applications on novel architectures. Profile node- and scale-level bottlenecks, design algorithmic/software solutions, translate application needs into software and hardware features, and develop performance models for future hardware.

The DFT Engineer will implement DFT methodologies for SOCs, develop tests for verifying DFT functionality, collaborate with cross-functional teams on ASIC products, and solve testing challenges.