Search the 7 jobs at MIPS

In this role, you will have technical ownership of automating software development processes, focusing on building, testing, and deploying containers. You'll collaborate with teams to enhance software quality, implement security measures, and maintain application reliability for SaaS products.

The Staff Engineer - Full Stack Developer will lead the development and implementation of a cloud application for the semiconductor industry, focusing on product configuration and customer support. Responsibilities include managing the entire software development process, designing front-end and back-end services, writing APIs, and ensuring application performance and security.

The Sr Staff Trace Design Engineer will lead RTL development for TraceUnit design, specifying micro-architecture, and optimizing for power, performance, and area. The role includes collaborating with cross-functional teams for design validation and integrating functional verification support, ideally requiring significant experience in SOC and Trace architectures.

The MMU Design Engineer will design and implement MMU architectures for RISC-V CPUs, focusing on performance and scalability. Responsibilities include collaborating with teams for integration, creating documentation, and researching memory management techniques.

The Senior Design Verification Engineer will lead verification efforts for CPU designs, collaborating with designers and architects. Responsibilities include developing functional test plans, writing directed tests in C and SystemVerilog, analyzing coverage, and enhancing the verification environment utilizing various verification tools and methodologies.

The Design Verification Manager will own the verification function for CPU designs, collaborate with cross-functional teams, manage a diverse verification team, and drive improvements in verification methodologies. Responsibilities include developing project plans, creating functional test plans, and utilizing various tools for effective design verification.

The role involves leading RTL development of a high-performance Floating-Point Unit (FPU), focusing on architecture, design features, performance, power, area, and functional verification. The engineer will collaborate with teams to validate designs and optimize features across multiple execution modes.