Teams at MatX

Design, implement, and optimize Linux kernel drivers and low-level userspace libraries for PCIe AI accelerators. Prototype and validate features on pre-silicon platforms, perform first-silicon bring-up, debug hardware/software interactions, profile host I/O paths, deliver tests, and expose telemetry for management and BMC integration while influencing future chip architecture.

The AI Accelerator Silicon Architect will define compute architecture, analyze performance, and collaborate with teams on silicon architecture for AI workloads.

As a Formal Verification Engineer, you will ensure correctness in hardware and software by applying model checking and developing machine-checked proofs, collaborating with various teams for verification processes.