Teams at Marvell Technology

The Senior Staff Engineer will develop advanced DFT techniques for ASIC/SoC designs, ensuring quality and compliance through collaboration with various teams and pre-silicon validation.

Lead NPI test development for Packaged Integrated Voltage Regulators (PIVR/IVR). Develop electrical test plans, ATE hardware (load boards, sockets) and firmware, and drive pre- and post-silicon validation and production test programs while collaborating with cross-functional teams to support HVM ramp.

Design, verify and implement high-performance PHY and DSP ASIC blocks. Develop ASIC specs, architecture and RTL (Verilog/SystemVerilog). Create and execute verification plans, run lint/CDC/power analyses, optimize datapath designs, and collaborate with global teams.