Teams at Majestic Labs AI

Design and implement low-level runtime, firmware, and device software for custom AI accelerators. Responsibilities include firmware/boot/runtime contracts, low-latency host-accelerator communication, memory and interrupt management, observability/debug infrastructure, kernel/userspace boundaries, simulator and silicon bring-up, and cross-team debugging across hardware, compiler, runtime, and kernel layers.

Lead architecture and development of complex platform firmware for server System Control Processors, owning end-to-end design, OOB management, power/thermal sequencing, firmware update pipelines, silicon bring-up, and firmware security in collaboration with hardware, silicon, software, and security teams.

Lead architecture and end-to-end firmware design for server platforms, including OOB management, power and thermal control, boot sequencing, firmware update pipelines, and firmware security. Collaborate with silicon and hardware teams, drive silicon bring-up, produce architecture/spec documents, and enforce secure firmware practices.