Teams at Majestic Labs AI

Design, develop, and optimize compiler components for AI workloads across CPUs, GPUs, and custom accelerators. Enhance PyTorch Inductor, Triton, LLVM, and MLIR toolchains; create custom intermediate representations, code-generation passes, and optimization strategies; tune computational kernels for performance; and contribute to open-source compiler projects.

Manage vendor backend execution and NPI for data-center AI chips, coordinating schedules from RTL freeze and physical implementation through tapeout, post-silicon characterization, qualification, validation, and high-volume production. The role bridges hardware design, backend engineering, DFT, and product engineering while driving technical trade-offs and cross-functional execution.

Manage vendor backend execution and NPI for data-center AI chips, coordinating schedules from RTL freeze and physical implementation through tapeout, post-silicon characterization, qualification, validation, and high-volume production. The role bridges hardware design, backend implementation, DFT, and product engineering while challenging technical trade-offs and driving cross-functional execution.