Lattice Semiconductor Benefits Overview

Integrate digital and custom IP blocks into FPGA sectors and full-chip designs. Own design constraints, synthesis, timing analysis, DFT integration, verification, physical-design support, power modeling, and sign-off. Coordinate releases, issue resolution, and cross-functional engineering activities through tapeout and silicon validation. Analyze SPICE and power results across process, voltage, and temperature corners, correlate models with silicon data, and support production test screening.

Integrate and validate FPGA-based reference designs and components across hardware, software, and firmware systems. The role includes system integration, interoperability testing, hardware bring-up, logic verification, timing closure, debugging, root-cause analysis, test planning, and documenting design decisions and validation results. Candidates will work cross-functionally with development and validation teams and support connectivity and embedded designs using protocols such as PCIe, Ethernet, DisplayPort, HDMI, MIPI, SDI, USB, and I2C.

Architect and develop complex C++ and SystemC hardware models, firmware, software, and QEMU-based emulation platforms. Debug models and Python processing code, support model-driven hardware design flows, validate implementations, and collaborate across teams to improve development methodologies. The role also provides technical leadership and mentorship to engineers adopting model-first development.