Teams at Kandou AI

The IT Manager will oversee hardware setup, user support, system configuration, and liaise with vendors to ensure IT compliance and operation across multiple sites.

Design and implement DFT solutions including hierarchical MBIST and scan insertion, ATPG pattern generation and coverage convergence, timing-aware pattern simulation, IJTAG cycle-accurate functional patterns, and debug silicon with test and production teams through probe and final test.

The FPGA Engineer will design and validate FPGAs, collaborate with other engineers, support lab bring-up, and analyze results using Python. Strong skills in high-speed digital circuits and team collaboration are essential.