Teams at Intel

Analyzes complex business processes, requirements, data structures, workflows, and quality issues. Facilitates design sessions, identifies automation opportunities, supports system functionality decisions, coordinates stakeholders, tests prototypes, and leads user acceptance testing. The role also tracks project and process KPIs, improves reporting and efficiency, and may perform lightweight project management across multiple applications and programs.

Develops and qualifies advanced wafer and die sort interface technologies for semiconductor packaging and test. Responsibilities include designing experiments, developing electro-mechanical test hardware, creating sort design rules and interface design kits, collaborating with customers and DFT teams, managing probe card and PCB suppliers, and driving manufacturing readiness for new product introductions across Intel, Foundry, and OSAT programs.

Validate and optimize Ethernet and PCIe networking solutions for AI and HPC infrastructure. Conduct stress testing, physical-layer characterization, interoperability testing, and root-cause analysis across electrical signaling, firmware, and Layer 1–2 protocols. Collaborate with hardware, software, IP design, silicon integration, electrical validation, and customer support teams to resolve complex link issues and improve product quality. The role requires regular onsite presence in Hillsboro, Oregon.