Teams at InnoPhase IoT

The Senior SoC STA Engineer is responsible for chip-level timing sign-off, developing SDC constraints, and driving timing closure while collaborating with cross-functional teams for successful tape-outs.

This role involves developing and debugging embedded firmware for wireless SoCs, analyzing performance metrics, supporting silicon validation, and collaborating with engineering teams.

The Design Verification Engineer is responsible for constructing test benches, developing verification plans, debugging use-cases, and collaborating with design teams to ensure compliance with specifications.