Teams at InnoPhase IoT

Develops wireless communication hardware and simulation systems across RF, PHY, MAC, signal processing, ASIC, and FPGA domains. Responsibilities include creating DSP engines, SystemVerilog RTL, microarchitecture, verification tools, synthesis flows, timing closure, and front-end design integration. The role collaborates with verification, validation, and physical design teams to optimize performance, power, area, timing, and coverage. Requires advanced wireless communications and digital design expertise, with up to 15% domestic travel.

Design and architect digital subsystems for low-power IoT SoCs, implement RTL (SystemVerilog/Verilog), create testbenches and stimulus, manage multi-clock/power domains and timing closure, integrate security features (TrustZone, Secure Boot, PSA L2), and collaborate cross-functionally to deliver silicon to high-volume production.

Plan, coordinate, and deploy multi-component embedded firmware releases. Define versioning/branching strategies, automate promotions and changelogs, integrate test results, quarantine flaky tests, and manage SoC development workflows. Collaborate with SW, ASIC, DevOps, and SQA teams, review commits for readiness, and maintain release documentation.