Teams at Elevate Semiconductor

Lead architecture, design, simulation, and validation of high-speed precision CMOS ATE analog circuits. Own blocks through layout, verification, and post-layout analysis. Drive mixed-signal simulation strategy, mentor engineers, and collaborate with test, applications, and manufacturing to deliver robust silicon.

Lead analog architecture for ATE ICs, mentor engineers, drive innovations in circuit techniques, oversee design processes, and collaborate with stakeholders to achieve technical excellence.

The Staff Analog IC Layout Engineer will lead the physical layout of complex analog and mixed-signal integrated circuits, ensuring optimal design and verification while collaborating with various engineering teams.