Jobs at DriveNets

Manage domestic and international logistics transactions, shipping orders, freight forwarders, carriers, and customs brokers. Monitor shipments, ensure on-time delivery, resolve transportation issues, maintain documentation and data integrity, and support logistics process optimization. Collaborate with Supply Chain, Operations, Finance, Manufacturing, and external partners while helping scale global logistics operations.

Lead technical architecture for complex AI/HPC GPU infrastructure pre-sales engagements. Design compute clusters, lead proofs of concept and benchmarking, advise executive and technical stakeholders, develop reference architectures, provide product feedback, mentor solution teams, and represent the company through events and technical content. Focus areas include GPU virtualization, orchestration, distributed training and inference, compute-to-network integration, and hyperscale infrastructure.

Lead technical architecture for strategic AI/HPC compute infrastructure opportunities, including GPU cluster design, benchmarking, orchestration, virtualization, and compute-to-network integration. Partner with sales and solutions teams through complex pre-sales cycles, engage executive stakeholders, guide proofs of concept, provide product feedback, publish technical guidance, mentor technical staff, and represent the company at industry events. Travel approximately 10% domestically and internationally.

Develop and optimize high-performance software for AI datacenter networking: implement NOS features, integrate smart NICs, build telemetry, design AI-optimized load balancing, debug datapath bottlenecks, and collaborate with QA on testing and validation.

Designs and develops high-speed analog and digital circuit boards for Ethernet products. Responsibilities include creating schematics, overseeing PCB layouts, evaluating hardware solutions, conducting lab measurements, troubleshooting, reviewing designs for manufacturability, and managing component selection. The role also provides technical leadership and collaborates with engineering, production, customers, marketing, and program management teams.

Drive NPI and system product engineering for networking switches and data center systems, transitioning products from DVT through PVT and high-volume manufacturing. Responsibilities include production line setup, line balancing, fixture and test-station validation, takt-time optimization, capacity ramp-up, yield monitoring, production test refinement, and hands-on root-cause analysis of hardware and assembly failures. The role supports contract manufacturers globally and requires travel to overseas manufacturing sites.

Develop and integrate board support packages, bootloaders, device trees, hardware abstraction layers, firmware, and low-level drivers for carrier-grade networking platforms. Support hardware bring-up, board validation, debugging, performance optimization, and embedded Linux stability improvements. Collaborate with hardware and systems teams, integrate third-party SDKs, and contribute to high-performance routers and switches using ASICs, SoCs, NICs, CPLDs, and FPGAs.

Designs and deploys AI/HPC networking infrastructure for customers, including Linux GPU systems, network fabrics, rack layouts, automation, monitoring, and data center upgrades. Supports service reliability, performance optimization, and lifecycle operations. Partners with sales, engineering, support, and customers on solution design, requirements, deployments, product feedback, technical content, training, and roadmap planning. Requires strong data center networking, solution architecture, communication, and customer-facing skills, with up to 20% domestic and international travel.

Performs signal integrity analysis, simulation, modeling, and validation for high-speed Ethernet, PCIe, DDR5, and SERDES interfaces. Develops PCB signal integrity guidelines, resolves reflection, crosstalk, jitter, loss, eye-diagram, and power delivery issues, and conducts pre- and post-layout measurements. Collaborates with PCB layout and hardware engineering teams to ensure electrical compliance and optimize high-speed designs.

Lead power integrity engineering for high-performance networking hardware, including defining and optimizing board- and package-level power delivery networks. Responsibilities include PI simulation, target impedance analysis, DC and AC performance validation, PCB and decoupling optimization, SI/PI coordination, laboratory measurements, design reviews, bring-up support, issue resolution, and development of scalable PI methodologies.

Lead end-to-end system architecture for carrier-grade networking platforms, defining hardware-software interfaces, functional requirements, thermal and power constraints, and platform trade-offs. Guide cross-functional hardware, software, mechanical, and validation teams; author detailed specifications and interface documents; oversee system-level testing, platform bring-up, compliance, and root-cause analysis. Provide technical leadership across Ethernet switching, IP routing, timing, synchronization, high-speed I/O, and signal and power integrity.

Develop and maintain board support packages, bootloaders, device trees, firmware, and low-level drivers for carrier-grade networking hardware. Support hardware bring-up, board validation, debugging, performance optimization, and embedded Linux stability. Collaborate with hardware and systems teams, integrate third-party SDKs, and implement solutions for ASIC-, NIC-, SoC-, FPGA-, and networking platforms.

Designs, deploys, operates, and troubleshoots enterprise and datacenter networks and security environments. Manages routing, switching, VPNs, firewalls, load balancers, monitoring, and security controls. Develops network automation with Python, Golang, or Shell; builds self-service infrastructure platforms; and supports scalable cloud and hyperscale architectures. Participates in architecture reviews, capacity planning, disaster recovery, and operational excellence while mentoring team members and collaborating with infrastructure, security, and engineering teams.

Build and operate scalable hybrid infrastructure across AWS, Azure, on-premises, and virtualization platforms. Manage identity and access systems, enterprise endpoint management, Linux environments, networking, backups, and infrastructure automation. Develop internal tools, improve developer productivity, ensure reliability, security, compliance, and cost efficiency, and collaborate with IT, DevOps, R&D, and Security teams. Maintain technical documentation and support mission-critical development and production environments.

Develops internal AI-powered products and tools, evaluates and integrates AI development solutions, builds proof-of-concept projects, establishes prompt engineering practices, creates training materials, and advises leadership on AI adoption across engineering teams.

Own and evolve a Kubernetes-based platform supporting cloud-native, stateful, AI-powered cybersecurity services. Responsibilities include Helm portability, operator-managed workloads, ArgoCD GitOps, zero-downtime deployments, autoscaling, backup and restore, observability, load validation, air-gapped customer environments, developer tooling, and production on-call support. The role collaborates with AI/ML Ops, backend, research, and solutions teams while operating GPU-based inference infrastructure and customer deployments.

Design, develop, and deploy automated manufacturing test platforms for telecom, networking, and optical hardware. Consolidate legacy R&D tools, refactor test software, integrate AI-assisted development, and deploy test stations at global manufacturing facilities. Support production bring-up, stabilization, failure analysis, maintenance, cycle-time optimization, and MES/QMS/SFC integration. Collaborate with hardware, firmware, and validation teams while creating documentation, analytics tools, and root-cause reports.

Conduct signal integrity analysis, simulations, modeling, and measurements for high-speed Ethernet, PCIe, DDR5, and SERDES interfaces. Develop PCB signal integrity guidelines, resolve reflection, crosstalk, jitter, loss, eye-diagram, and power delivery issues, and perform pre- and post-layout validation. Collaborate with PCB layout and hardware engineering teams to ensure electrical compliance and optimize high-speed designs.

Lead power integrity activities for high-performance networking hardware, including architecture, PDN design, simulation, target impedance analysis, lab validation, and production support. Collaborate with ASIC, PCB, signal integrity, mechanical, manufacturing, and component teams to optimize power delivery for networking ASICs, SerDes interfaces, optical modules, and AI-scale systems. Develop PI methodologies, resolve bring-up issues, and drive hardware sign-off and continuous improvement.

Lead power integrity activities for high-performance networking platforms: define and simulate board/package PDNs, set target impedance, run pre/post-layout simulations, optimize layouts and decoupling, perform lab validation and correlation, resolve PI issues during bring-up and production, and work with cross-functional teams and vendors to ensure reliable PDN performance.