Teams at Cadence Design Systems

Lead technical evaluations and customer engagements for Cadence DSG platform; scope opportunities with sales, run advanced digital IC implementation flows (floorplan, placement, CTS, routing, SI/STA signoff), train teammates and customers, and report progress to management.

Design and optimize software and system solutions for scalable IP products (Neo NPU). Develop and optimize drivers and low-level firmware for embedded processors and emulation platforms, improve power/performance/area, support customers, and collaborate with cross-functional global teams. Functional safety and neural network knowledge are beneficial.

Develop and validate enhancements to the Jasper GUI (including the Visualize waveform viewer), collaborate on advanced debug capabilities in verification solutions, and work with the Systems and Verification team using C++ and strong data-structure knowledge.