Teams at Broadcom

Translate schematics into DRC/LVS-clean layouts for critical analog/RF IP blocks, collaborate on floorplanning, power/ground architecture, and device matching, and carry designs from initial floorplan through tape-out using industry EDA tools on advanced FinFET nodes.

Senior individual-contributor software engineer responsible for designing, developing, and maintaining NetMaster and SOLVE product features on z/OS. Work includes parsing SMF/zERT records, debugging production mainframe issues, writing tests, leading design/code reviews, mentoring junior engineers, and collaborating with product owners and architects to deliver robust, maintainable software.

The Hardware Engineer will evaluate silicon technology for IP and product designs, focusing on technology assessment, design enablement, and collaboration with foundry and design teams. Responsibilities include test structure layout, simulation, silicon characterization, and ensuring design quality across multiple projects.