Teams at Arrow Electronics, Inc.

Design and architect high-performance analog/mixed-signal building blocks (PLLs, ADCs/DACs, RFICs). Perform pre-/post-layout simulations and sign-off (Monte Carlo, corner, noise, EM/IR/Aging). Use Cadence Virtuoso and simulators (Spectre/HSPICE), run physical verification (Calibre/IC Validator), and reliability/power checks (Voltus/RedHawk). Drive multi-node design across planar and FinFET processes and adopt automated/script-based verification (Python/SKILL/Tcl).

No detailed responsibilities provided. Senior-level Design-for-Test (DFT) engineer role based in Bangalore in engineering services; likely involves leading DFT activities within chip design projects.

Drive adoption of Microsoft 365 Copilot, Power Platform, automation, and collaboration technologies. Partner with stakeholders to identify use cases, lead solution workshops, build prototypes and reusable solutions, deliver training, and improve adoption. Administer and engineer Teams, SharePoint Online, OneDrive, and Exchange Online while establishing governance, security, compliance, and responsible AI practices. Develop Power Platform and PowerShell automations and translate business needs into secure, scalable workplace solutions.