Jobs at Ambiq

Develop and optimize low-power embedded software for Ambiq microcontrollers and SoCs. Responsibilities include creating drivers, applications, tools, board support packages, and documentation; characterizing and profiling power usage; enabling Zephyr and AmbiqSuite; debugging hardware and software issues; supporting customers and field engineers; and assisting with hardware evaluation platforms and silicon issue analysis.

Leads design-for-test implementation for ultra-low-power SoCs, including scan insertion, boundary scan, MBIST, ATPG, low-power DFT architecture, test vector generation, coverage and test-time optimization, and pre/post-layout simulations. Collaborates with design and test engineering teams on timing, physical, power, logical issues, and production test bring-up on silicon.

Grow Ambiq’s China business by expanding existing accounts, developing new opportunities, securing semiconductor design wins, and achieving revenue targets. Manage customer and distributor relationships, guide projects from design-in through mass production, coordinate internal technical and commercial teams, provide sales forecasts, and monitor competitors and market trends across edge AI, IoT, medical, industrial, and wearable applications.

Leads the physical design organization for ultra-low-power MCU products, defining strategy, building global teams, establishing implementation methodologies, and overseeing floorplanning, power planning, CTS, place-and-route, timing closure, physical verification, and reliability sign-off. Partners with architecture, RTL, analog, verification, product engineering, operations, and foundries to optimize PPA, manage schedules and risks, deliver tape-outs, and support post-silicon debug.

Own pre-tapeout quality for digital SoC modules on MCU platforms. Responsibilities include architecture and microarchitecture, Verilog/SystemVerilog RTL development, third-party IP integration, verification and FPGA collaboration, timing and power closure, LINT/CDC/RDC quality checks, silicon bring-up, and validation. The role requires expert-level SoC design knowledge, technical leadership, and the ability to guide programs across technical areas.

Maintain and improve semiconductor production test operations, including yield improvement, production tooling, test program troubleshooting, and platform transfers across D10, DX, and S100 systems. Manage tooling vendors, resolve production hardware issues, support OSAT yield and RMA analysis, track production data, and coordinate with engineering, quality, and planning teams to improve efficiency, quality, and shipping performance.

Develop and test the Ambiqsuite SDK for MCU devices and emulation platforms. Extend hardware abstraction layers, board support packages, and device drivers for new platforms. Create SDK examples and test cases, analyze embedded-system issues, perform hands-on debugging, and build Python automation scripts for SDK development, builds, and verification workflows.

Lead development, integration, optimization, and validation of GPU hardware abstraction layers and graphics software stacks for embedded Ambiq MCUs. Responsibilities include OpenGL ES and vector graphics middleware, display integration, UI frameworks, performance and power optimization, example applications, testing, FPGA pre-silicon verification, post-silicon bring-up, and hands-on hardware/software debugging.

Leads architecture, development, testing, debugging, profiling, and optimization of SDK power-management software for low-power ARM Cortex-M MCUs. Responsibilities include clock and memory management, low-power modes, RTOS ports, power modeling, system-level optimization, technical reviews, cross-functional issue resolution, and mentoring. The role requires hands-on embedded firmware development and technical leadership across hardware, software, validation, and vendor teams.

Leads system-level test strategy, regression framework development, embedded test implementation, laboratory instrumentation automation, and root-cause debugging for MCU platforms. The role supports FPGA, emulation, and post-silicon validation, improves test reporting and traceability, collaborates with global hardware and software teams, and mentors engineers on automation, debugging, and test quality.

Provides technical leadership for embedded MCU software development focused on Secure Boot ROM, secure bootloaders, SDK security, cryptographic operations, HAL, and BSP development. Leads security feature implementation from design through production, including FPGA and silicon testing, debugging, automated testing, and cross-functional collaboration. Requires deep expertise in ARM architectures, bare-metal and RTOS systems, embedded security, C/C++, Python, and low-level hardware/software debugging.

Leads architecture, specification, transistor-level design, verification, layout supervision, validation, and production release of complex analog and mixed-signal IC subsystems. The role addresses power management, clocking, data conversion, advanced-node design, manufacturing test, and post-silicon characterization. It also guides senior engineers, leads technical reviews, resolves cross-functional issues, and supports product development and customer problem resolution.

Supports low-power DFT implementation and verification for SoC designs, including scan insertion, scan-chain verification, MBIST, rule checking, test-coverage analysis, and debugging. Develops Tcl, Python, and Shell scripts for automation, documents methodologies and results, and collaborates with RTL, DFT, design verification, and physical design engineers.

Explore AI/ML-assisted and self-adaptive memory design techniques for optimizing performance, power efficiency, robustness, and yield. Analyze memory assist methods, operating conditions, failure signatures, and process variations. Develop adaptive monitoring, prediction, voltage, timing, and read/write control techniques, then document, benchmark, and present the proposed architecture and design insights.

Own revenue and product margin planning, forecasting, and budget-to-actual analysis for semiconductor products and manufacturing operations. Build financial models and R&D investment business cases, including ROI, payback, and sensitivity analyses. Partner with Sales, Marketing, R&D, Manufacturing, Operations, Accounting, and executives to optimize margins, prioritize investments, explain financial performance, and support investor relations. The role includes periodic travel to Taiwan and occasional late-night calls.

Leads physical implementation of analog IC subsystems including PMUs, clocking, and data converters. Responsibilities include floorplanning, transistor-level layout, matching, shielding, parasitic extraction, LVS/DRC closure, tape-out, validation, production test support, and layout review. Collaborates with analog, digital, RTL, physical design, product, and applications engineering teams. This is an onsite role requiring five days per week.

Leads specification, architecture, transistor-level design, verification, layout supervision, validation, and manufacturing test for complex analog IC subsystems. Partners with architecture, RTL, product, applications, and marketing teams; resolves cross-block issues; supports customer and manufacturing challenges; and mentors senior engineers without formal management responsibility.

Leads the analog design organization and sets architecture, specifications, methodology, and technical direction across multiple semiconductor programs. Directly designs or supervises critical transistor-level analog blocks, oversees verification, validation, layout, and production bring-up, and resolves high-risk technical issues. The role also mentors and manages engineers, chairs design reviews, partners with digital and product teams, supports customer and executive discussions, and drives improvements in tools, design flow, and IP reuse.

Lead system architecture for next-generation ultra-low-power AI SoCs from concept through production. Define processor, memory, interconnect, clocking, power, accelerator, and hardware/software partitioning strategies while managing power, performance, and area tradeoffs. Develop architecture specifications and models, evaluate IP, guide silicon implementation and validation, collaborate with customers and cross-functional engineering teams, and mentor architecture staff.

Responsible for post-silicon validation and characterization of analog and mixed-signal SoC subsystems. Develop validation plans, automate testing and data analysis, characterize silicon across process, voltage, and temperature, analyze performance, correlate results with simulation and production data, and debug analog, digital, firmware, power, and board-level interactions. The role also supports validation hardware, lab infrastructure, test coverage, yield improvement, and production readiness.