Teams at Ambarella, Inc.

Design and implement ASIC components including video compression, image processing, vector processors, neural network accelerators, processor cores, and memory subsystems. Develop and verify RTL using Verilog and SystemVerilog, optimize designs for performance, power, and area, improve design methodologies and tool flows, analyze coverage, support chip bring-up, and collaborate with verification teams.

Leads development, optimization, modeling, and verification of real-time hardware video codecs for AI-enabled camera silicon. Designs embedded firmware, rate-control systems, diagnostics, and silicon validation tools while driving hardware/software co-design. Collaborates with architecture, hardware, and software teams, provides technical leadership, and mentors junior engineers.

Develop and optimize AI-enabled video codec software for camera silicon, focusing on video quality, low latency, and hardware efficiency. Responsibilities include maintaining reference codec models, supporting hardware/software co-design, building verification and diagnostic tools, developing real-time firmware, tuning rate-control algorithms, and integrating codec solutions with engineering teams.