Teams at Altera (altera.com)

Lead emulation strategy and implement emulation methodologies for pre-silicon validation. Develop and debug emulation testbenches for complex FPGA designs, integrate hardware and software, build automation frameworks, identify performance bottlenecks, and improve emulation infrastructure while collaborating with silicon design, verification, and firmware teams.

Perform block-level physical implementation of custom IP and SoC designs from RTL to GDSII. Execute synthesis, floorplanning, P&R, CTS, STA, and physical verification. Resolve timing, power, and signal-integrity issues, support DFT integration and signoff, and develop/automate physical design methodologies to optimize PPA and manufacturability.

We are looking for a college graduate to design and optimize layout for analog and mixed-signal integrated circuits, collaborating with experienced engineers on various tasks.