Teams at Altera (altera.com)

Develops and integrates DFT solutions for complex ICs, including SCAN, MBIST, BSCAN, ATPG, RTL, simulation, verification, and timing closure. Optimizes designs for test coverage, manufacturing efficiency, and physical implementation. Collaborates with architecture, verification, manufacturing, and post-silicon teams to support IP and SoC integration, silicon debug, mixed-signal DFT, and test content delivery.

Design complex analog circuit layouts and perform comprehensive verification for design rules, electromigration, IR drop, ESD, and reliability. Plan floorplans, power grids, bumps, shielding, and signal matching while optimizing area, power, reliability, and performance. Develop layout methodologies, troubleshoot design and tool-flow issues, and collaborate with circuit, process technology, and package design teams to meet specifications.

Leads application engineering for Agilex FPGA devices, resolving customer escalations, supporting field teams, developing reference designs and technical collateral, delivering training, and collaborating with global R&D and design teams. Requires expertise in RTL design flows, FPGA/ASIC processes, timing closure, Quartus methodologies, and complex system-level problem solving involving 5G and DSP technologies.