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Lead module product engineering from NPI through high-volume production and sustaining. Manage and staff the module PE team, define manufacturability and qualification standards, drive cross-functional alignment, resolve major yield/quality issues, and improve cost, yield, cycle time, and production robustness while representing module PE to senior leadership and customers.

The Senior Executive Search Recruiter will lead executive recruitment processes, manage relationships with search firms, and partner with senior leadership to ensure effective hiring for G-level positions.

The role involves overseeing executive recruiting processes, managing search strategies, and collaborating with senior leaders to ensure quality hiring outcomes for G-level positions. Responsibilities include governance, process excellence, search firm management, and providing market intelligence to influence talent strategies.

Develop and maintain ATE test programs and hardware/software solutions for NPI, qualification, characterization, and production. Coordinate cross-functionally to enable ramps, support yield and returns, mentor junior engineers, and manage external test partners.

Lead and standardize functional safety (FuSa) architectures for PMICs and system-level power, define reusable FuSa blocks, interface with SoC/MCU teams and safety assessors, drive tool-based FuSa workflows, mentor FuSa engineers, advise design and validation, and engage with customers and stakeholders to balance safety, cost, area, and performance.

Lead development of ATE test programs, support qualification/characterization, mentor junior engineers, implement test processes and hardware/software solutions, support production yield and equipment maintenance, and coordinate cross-functional and third-party teams for analog power product testing.

Lead standardization and definition of functional safety (FuSa) architectures for PMIC/power IC products. Define system-level FuSa requirements, create reusable FuSa library, align with MCU/SoC teams, interface with safety assessors, guide product teams on implementations, review simulations and validations, drive tool-based FuSa workflows, mentor FuSa engineers, and engage with customers and stakeholders. Travel for customer/internal meetings required.

Design and architect Verilog RTL for mixed-signal memory buffer ASICs (DDR5/DDR6+), lead digital implementation (synthesis, STA, P&R hand-off), verification (formal, lint, CDC), DFT and gate-level debug, produce documentation, and mentor junior engineers.

Lead quality improvement for new product introductions and volume ramp of semiconductor products. Define and track continuous improvement, analyze DPPM and returns, implement customer-specific requirements, coordinate cross-functional problem solving, ensure automotive standards compliance, engage with customer QA and suppliers, and represent on external standards committees.

Lead analog CMOS power-management block design from specification through production: architecture, simulation, layout supervision, lab evaluation, test/DFT strategy, verification planning, mentoring, and customer-facing support to ramp products.