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Reposted 10 Days AgoSaved
In-Office or Remote
Sunnyvale, CA, USA
145K-225K Annually
Mid level
145K-225K Annually
Mid level
Semiconductor
The engineer will perform EM/IR analysis for analog chiplet IP solutions, ensuring design robustness and coordinating with design and layout teams.
Top Skills: Cadence EdaCadence VoltusParagonxSpectreVirtuosoVoltus-Xfi
Reposted 13 Days AgoSaved
In-Office or Remote
8 Locations
Expert/Leader
Expert/Leader
Semiconductor
Lead digital IC design and architecture for die-to-die connectivity solutions, collaborating with multidisciplinary teams to develop competitive products.
Top Skills: BowDdrDfxRtlSerdesUcie
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