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As a Senior Simulation Engineer, you will build a QEMU-based functional simulator for AI accelerator hardware, collaborate closely with hardware and software teams, and ensure software correctness through meticulous simulation of low-level device behaviors.

Responsible for implementing complex IC physical designs, collaborating with teams to optimize performance, power, and area while ensuring design integrity and manufacturability.

The DFT Engineer will implement DFT for an AI accelerator ASIC, focusing on scan, ATPG, memory test, and automation to enhance workflows.

The role involves optimizing ML kernels, building low-level control paths, and collaborating with various teams to enhance performance.

The role involves improving developer workflows, managing CI/CD pipelines, optimizing Bazel builds, and extending support for new languages.

Develop cutting-edge AI accelerator solutions by improving developer workflows, managing CI/CD pipelines, optimizing Bazel builds, and extending system support.

The Senior Rust Software Engineer will develop server-side software for AI inference, influence architecture, conduct research, and solve performance challenges.

Develop and deliver manufacturing test solutions for an AI accelerator chip, focusing on ATE test program development, debug, and silicon optimization.

The role involves leading the development of manufacturing test solutions for AI accelerator devices, spanning the full silicon lifecycle and requiring expertise in DFT methodologies and high-speed interface testing.

Produce consolidated monthly management accounts for a multi-entity group, own month-end close and finance systems (Xero, NetSuite migration), manage intercompany and multi-currency reconciliations, support budget vs. actuals, cashflow forecasting and FP&A growth, help run day-to-day finance operations including AP and compliance, and identify automation opportunities to improve the finance function.