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As a Mixed-Signal Engineer in the CTO Office, you'll develop high-performance analog and mixed-signal circuits for next-generation products, particularly focusing on 100+Gbps serial transceivers using advanced CMOS technologies. You'll engage with the CTO and engineering teams, define specifications, drive design and layout, and ensure performance targets are met through collaboration and hands-on experimentation.
As a Connectivity Systems Engineer, you'll develop next-generation optical and electrical connectivity technologies. Responsibilities include system-level simulations of high-speed electrical and optical links, enhancing simulation platforms, deriving specifications, and collaborating on prototypes. The role supports AI and networking advances, contributing to internal and external presentations.
The IC Design Integration Quality Engineer will establish quality gates in the IC design process, monitor IC designs for quality assurance, perform DFMEA analysis, collaborate with teams to meet design specifications, maintain quality documentation, implement process improvements, and ensure design reviews meet quality metrics.
The Staff DFT Engineer will develop and support DFT methodologies, automate verification test benches, and build scan insertion flows for SoCs. The role involves architecting integrated RTL-centric DFT environments and ensuring quality control for DFT designs across various complex systems.
The Senior/Staff/Principal Product Applications Engineer will provide technical support for customers using Alphawave's DSP chips, ensuring integration into customer designs and working closely with internal teams. Responsibilities include authoring technical documentation and validating product performance, with potential travel required for customer engagement.
As a Senior Design Verification Engineer, you will develop verification plans, construct testbenches, analyze test failures, and perform behavioral modeling of circuits. You will lead and collaborate with various teams, facilitate compliance testing, and contribute to continuous improvement in verification methodologies.
The Principal DFT Engineer will develop and support DFT methodologies and flows across various projects, automate verification test benches, build scan insertion flows, and write timing constraints for Integrated DFT environments.
The Sr. ATE Test Engineer will work on semiconductor testing processes, collaborating with DFT, product, and test engineering teams. Responsibilities include defining testing strategies, designing test hardware, and managing production test programs, while leading yield improvement efforts and ensuring effective communication with suppliers.
Lead the Architecture and Design team in enhancing capabilities in Front End Design and Architecture. Responsible for RTL Design, Verification, and ensuring quality checks, timing closure while coordinating with Physical Design teams.
As a Senior IP Application Engineer at Alphawave Semi, you will own and drive ASIC IP solutions for customers, collaborate with pre-sales teams, and work with ASIC engineering teams on IP implementations. Your role involves customer-facing technical discussions, defining and procuring digital blocks, and guiding integration processes.
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