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Responsible for verification of IP, Block, or Subsystem at SoC Level, generating documentation, debugging verification tasks, and developing the verification environment and components. Requires a strong understanding of functional verification and experience with various interfaces and methodologies.

The Principal Engineer - SOC Verification is responsible for verifying IP, Block, or Subsystem at SoC Level, developing and owning the verification environment, and generating necessary documentation. The role requires an understanding of the verification flow, experience with digital verification aspects, and proficiency in various protocols and scripting languages.

Perform physical design and verification tasks in advanced process nodes for ASIC development. Mentor junior team members and ensure IP integration. Reporting to ASIC Design Director.