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4 Hours Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
The Senior Analog Design Engineer will develop and optimize analog block performance while handling circuit implementation, layout, and design strategies. Responsibilities include characterizing circuits, overseeing physical layouts, and collaborating with application teams.
4 Hours Ago
Toronto, ON, CAN
636 Employees
Expert/Leader
636 Employees
Expert/Leader
Semiconductor
The Staff Design Verification Engineer at Alphawave Semi will architect, design, and verify DSPs using high-speed mixed-signal PHYs. Responsibilities include developing scalable testbench components with UVM, overseeing the verification process, collaborating with design teams, and mentoring junior members.
4 Hours Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
The Program Manager will oversee new product development projects, managing high-level scheduling, stakeholder alignment, and milestone tracking. Responsibilities include driving projects through the stage gate process and ensuring efficient execution while coordinating between finance, marketing, PMO, and engineering teams.
4 Hours Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
As a Mixed-Signal Engineer in the CTO Office, you'll develop high-performance analog and mixed-signal circuits for next-generation products, particularly focusing on 100+Gbps serial transceivers using advanced CMOS technologies. You'll engage with the CTO and engineering teams, define specifications, drive design and layout, and ensure performance targets are met through collaboration and hands-on experimentation.
4 Hours Ago
Bangalore, Bengaluru, Karnataka, IND
636 Employees
Mid level
636 Employees
Mid level
Semiconductor
As a Principal Engineer - RTL Design at Alphawave Semi, you will play a crucial role in advancing data communication technologies across multiple industries, including AI, networking, and autonomous vehicles. Your responsibilities will involve developing innovative designs that meet the challenges of the digital future.
636 Employees
Senior level
Semiconductor
As a Senior Design Verification Engineer, you will develop verification plans, construct testbenches, analyze test failures, and perform behavioral modeling of circuits. You will lead and collaborate with various teams, facilitate compliance testing, and contribute to continuous improvement in verification methodologies.
636 Employees
Senior level
Semiconductor
The Senior/Staff/Principal Product Applications Engineer will provide technical support for customers using Alphawave's DSP chips, ensuring integration into customer designs and working closely with internal teams. Responsibilities include authoring technical documentation and validating product performance, with potential travel required for customer engagement.
4 Hours Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
As a Connectivity Systems Engineer, you'll develop next-generation optical and electrical connectivity technologies. Responsibilities include system-level simulations of high-speed electrical and optical links, enhancing simulation platforms, deriving specifications, and collaborating on prototypes. The role supports AI and networking advances, contributing to internal and external presentations.
4 Hours Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
The Staff DFT Engineer will develop and support DFT methodologies, automate verification test benches, and build scan insertion flows for SoCs. The role involves architecting integrated RTL-centric DFT environments and ensuring quality control for DFT designs across various complex systems.
4 Hours Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
The Principal DFT Engineer will develop and support DFT methodologies and flows across various projects, automate verification test benches, build scan insertion flows, and write timing constraints for Integrated DFT environments.
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