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The role focuses on leading semiconductor packaging process development and managing partnerships to ensure high volume manufacturing of AI products.

As an SQA Engineer, design and execute test plans, develop automated testing scripts, perform hardware-firmware integration testing, and manage software defects to ensure product quality.

The Package Integration Engineer will manage packaging integration, vendor coordination, and project execution, focusing on improving yield and coordinating cross-functional manufacturing efforts.

The Digital Design Engineer will design and optimize DSP algorithms for high-speed SERDES, collaborating with cross-functional teams to integrate solutions into advanced systems.

The Package Reliability Engineer will conduct reliability analysis, manage OSAT collaborations, select materials, and perform failure analysis for advanced packaging systems.

Lead the ASIC design team overseeing development, scheduling, and resource management, ensuring designs meet performance goals and timelines.

The Senior AMS Design Engineer will architect and implement high-speed analog and mixed-signal circuits for photonic transceivers and electronic ICs while collaborating with multidisciplinary teams.

Manage complex semiconductor programs from IP development to platform delivery. Collaborate with engineering teams, manage customer interactions, and ensure program excellence.

The Test Engineer will develop, debug, and optimize ATE and SLT test programs, analyze test data, and support new product introductions. Expertise in optics-based testing is desirable.

Drive AI product assembly processes from concept to high volume manufacturing, collaborating with foundries and managing technology development while ensuring reliability and cost efficiency.