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Develop and implement complex digital designs for high-performance ASICs and SoCs. Optimize designs for power, performance, and area. Experience with deep technology nodes and large designs.

As an RTL design engineer, you will collaborate with architects and implementation leads to define and implement RTL modules. Emphasis will be placed on minimizing power consumption while creating high quality, re-useable design.

As an AMS Design Engineer, you will be responsible for driving the innovative, high-speed analog architecture for low-power, high-performance AMS solutions customized for AI applications. You will perform top-down architectural analysis, develop understanding of subsystem requirements, enhance system performance, and define design specifications and verification plans. The role requires a Master's degree with 3+ years of experience or a PhD with 3+ years of experience. Strong skills in MATLAB, Simulink, Verilog, data converter architectures, and analog techniques are necessary.

Join Celestial AI as a Photonics Layout Engineer and be an integral part of the Physical Design team responsible for layout of Silicon Photonic chips and devices.

Seeking a Senior SI/PI Engineer to develop and validate energy efficient AI compute and photonic data transmission solutions. Responsible for optimizing performance and developing a design process for package and PCB level interconnect and power delivery. Strong project management and communication skills required.

Lead Reliability Engineer focused on datacenter and high-performance computing applications. Lead reliability strategies, testing, analysis, and root cause investigations. Collaborate with cross-functional teams and stay updated on industry trends to enhance system reliability and performance.

Drive innovative System Architecture for high-speed analog Serdes customized for AI applications. Responsibilities include modeling, simulation, and analysis of systems, defining standards, designing experiments, debugging problems, and collaborating with designers. Qualifications include a master's degree with 6+ years of experience or a PhD with 3+ years of experience, expertise in high-speed serial data protocols, communication system modeling, high-speed DSP, FEC, Analog Serdes, and DSP block design.