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As a Principal Customer Engineer at Enfabrica, you'll engage deeply with customers, providing technical pre-sales support and engineering solutions for data center and AI/ML applications. You'll collaborate with engineering teams, develop documentation, and oversee deployments while addressing customer needs in a highly technical environment.

The IC ASIC RTL Design Engineer is responsible for the entire design process from analysis to RTL implementation, ensuring robust design performance under various constraints. The role involves collaborating with multiple teams for the development of data processing engines and supporting verification and testing processes, including silicon bringup.

Join an ambitious team of silicon and distributed systems experts as a Hardware Emulation Engineer at Enfabrica. Responsibilities include owning and maintaining emulation infrastructure, chip level emulation models, and collaborating with cross-functional teams for chip validation. Key qualifications include emulation experience on platforms like Palladium, Zebu, or Veloce, scripting skills, Verilog/SystemVerilog expertise, and strong communication skills. This is a full-time job based in Hyderabad, India, with a preference for remote candidates in India.

Join an ambitious team of silicon and distributed systems experts as a Hardware Emulation Engineer at Enfabrica. Responsibilities include owning and maintaining emulation infrastructure, chip level models, and collaborating with cross-functional teams for chip validation. Key qualifications include experience with emulation platforms, Perl/Python scripting, Verilog, SystemVerilog, and strong communication skills.

Join an ambitious team as a design verification engineer and contribute to the development of a groundbreaking product in the distributed computing systems field. Collaborate with hardware and software architects to create efficient tests, define infrastructure, and ensure prototype meets specifications. Strong experience in chip verification, UVM, SystemVerilog, Python, and C/C++ required. Full chip verification and software engineering principles knowledge highly desirable. Minimum 15 years experience.