VLSI Verification Engineer

Posted 6 Days Ago
Be an Early Applicant
Santa Clara, CA, USA
In-Office
Mid level
Artificial Intelligence • HR Tech • Information Technology • Consulting
The Role
Perform VLSI functional verification using OVM/UVM for CPU subsystems, DDR controllers, and modem IPs. Create and run testbenches, debug failures, and collaborate with design teams on verification closure during a 6-month contract in Santa Clara.
Summary Generated by Built In
Company Description

EROS Technologies was founded with a simple motive of offering the clients exactly what they want, how they want and when they want it. By leveraging for its clients its technological edge and right-sourcing advantage, EROS in a short period of time has grown to become one of the most trusted strategic technology partners. Treating every client as the top priority, we customize our solutions and services to align with the unique needs of each client.

Job Description

Job Title: VLSI Verification Engineer

Location: Santa Clara, CA

Duration 6 Month Contract

Job description:

Verification engineers – OVM/UVM is Mandatory
CPU subsystem/DDR/Modem verification

Additional Information

All your information will be kept confidential according to EEO guidelines.

Skills Required

  • Experience with OVM/UVM verification methodology
  • Experience verifying CPU subsystems, DDR interfaces, and modem IPs
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The Company
125 Employees

What We Do

EROS Technologies Inc. is a global IT services and consulting company specializing in providing tailored workforce solutions and staffing, particularly in the technology sector. The company leverages AI-powered tools to deliver top-tier talent and provides 24x7x365 multi-vendor IT support, acting as a single source of accountability for mission-critical computing environments across demanding industries.

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