Staff Engineer, Digital Design Engineering

Reposted 8 Hours Ago
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Cavite, Calabarzon, PHL
In-Office
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Role
The Staff Engineer will lead digital RTL design and verification, collaborating with various teams, managing design checks, and mentoring junior designers.
Summary Generated by Built In

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

DIGITAL DESIGN ENGINEER

The Group 

The Joint Development Team (JDT) is a small, independent, cross-disciplinary group whose charter is to accelerate the development of key components, systems, algorithms, and techniques necessary to advance the state of the art in targeted areas and to collaborate with focused product development teams to get these advances to the marketplace. Current and future research areas include advanced medical devices, energy metering and fault detection, high-speed imaging, security electronics, ultra-precision references and data converters. 

The group is led by Analog Devices Fellow JED Hurwitz, a pioneer in CMOS imaging, recognized expert in ultra-high precision, and of broad industrial experience. The group culture aims to foster a challenging, exciting, and supportive environment. 

The team members must be comfortable working on a wide variety of products and technologies in a fast-paced and agile environment and will be exposed to various groups across the corporation’s many sites through all stages of the development cycle. 

The Role

The P4 Digital Design + DV Engineer will lead digital RTL design while also driving full-flow verification activities (UVM, testbench architecture, coverage closure). The engineer will collaborate with analog/mixed-signal designers and may switch between design and DV roles depending on project needs.

Essential Duties and Responsibilities: 

Digital Architecture & RTL Design

  • Define RTL architecture, module boundaries, interfaces, and control logic.
  • Develop and debug synthesizable SystemVerilog/VHDL RTL that meets functional, timing, and power requirements.
  • Architect and implement state machines, datapaths, arithmetic units, protocol engines, and digital control loops.
  • Perform design checks (lint, CDC, reset‑domain crossing, DFT readiness) and support synthesis/STA closure.

Integration & Cross Functional Collaboration

  • Lead or contribute to system or chip-level architecture planning
  • Support mixed-signal simulations, co-simulation flows, and integration testplans.
  • Collaborate with DV engineers to ensure correct verification scope, coverage, and feature signoff.
  • Lead or aid in the development of a verification strategy, verification plan, and test strategy.
  • Support the development of a UVM based testbench and the overall verification effort
  • Identify and implement constrained random and directed tests for verification
  • Contribute and support the overall verification efforts

Ownership & Technical Leadership

  • Lead design reviews, documentation, and technical mentoring of junior digital designers (P1–P3).
  • Evaluate, propose, and introduce improvements to digital design methodologies and flows.

Minimum Qualifications:

  • BS/MS in ECE, EE, CpE, or related field.
  • 5–10 years experience in digital RTL design and subsystem ownership.
  • Strong SystemVerilog/Verilog coding and debugging skills.
  • Experience with CDC, lint, DFT, synthesis, and timing analysis.
  • Strong scripting ability (Python/Perl/TCL).
  • Excellent communication and cross‑team collaboration skills.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

Top Skills

Perl
Python
Systemverilog
Tcl
Vhdl
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The Company
HQ: Wilmington, MA
20,292 Employees
Year Founded: 1965

What We Do

Analog Devices, Inc. (NASDAQ: ADI) operates at the center of the modern digital economy, converting real-world phenomena into actionable insight with its comprehensive suite of analog and mixed signal, power management, radio frequency (RF), and digital and sensor technologies. ADI serves 125,000 customers worldwide with more than 75,000 products in the industrial, communications, automotive, and consumer markets. ADI is headquartered in Wilmington, MA.

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