Senior/Staff Formal Verification Engineer

Key Responsibilities

• Drive formal verification efforts to ensure the correctness and performance of Custom-AI hardware designs at both IP and Sub-system level.
• Develop and execute verification plans: from creating formal property test plans to executing them and providing final sign-off based on thorough verification
• Collaborate with hardware designers and architects to define the properties and requirements that need to be verified, ensuring alignment with system-level goals and performance expectations.
• Analyze and debug formal verification results, provide actionable feedback to design teams, and assist in improving design decisions to enhance verification outcomes
• Contribute to the continuous improvement of verification methodologies, tools, and internal processes, ensuring our verification practices remain at the forefront of industry standards.
• Stay up-to-date with the latest advancements in formal methods and AI hardware verification, applying new techniques to improve our verification strategies

Minimum Requirements

• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
• 3+ years of proven experience in formal verification, especially Formal Property Verification.
• Hands-on experience with formal verification tools such as Cadence JasperGold, Synopsys VC Formal, or equivalent tools.
• Expertise in SystemVerilog Assertions (SVAs), with the ability to define, implement, and verify complex design properties is a must.
• Solid experience with RTL design (e.g., Verilog, VHDL) and understanding of digital design principles.
• A decent understanding of compute architecture, including CPU, GPU, or specialized AI hardware accelerators, and how to verify performance, timing, and functional properties within these architectures.
• Proficiency in scripting languages such as Python for automation and tool integration.

Preferred Skills & Experience

• In-depth understanding of complexity issues in formal property verification, including techniques to manage state space explosion, abstraction methods, and scalable verification strategies for large designs.
• Strong knowledge of AMBA protocols such as AXI, AHB, and APB, with the ability to verify the correctness of communication and data transfer between components using these protocols.
• Familiarity with the RISC-V Instruction Set Architecture (ISA) and its implementation in hardware, including the challenges of verifying custom RISC-V processors and accelerators.

What are some of the perks that you will receive being part of Untether AI? Aligned to Untether’s philosophy, our employees enjoy the same perks, regardless of role or level. In part, these include:

• 20 vacation days
• Strong health and extended health benefits
• Unlimited sick days
• Stock options
• Building chips and software that will change the world

Thinking about applying?

• We’re a pretty welcoming bunch of people. If we’ve piqued your interest, you’re passionate about the same things we are but you aren’t sure if you check all the boxes, please apply anyway. We’re a great place to work, an even better place to learn and we focus on both capability and potential!
• Besides being a pretty friendly group, we’re also pretty diverse - ethnically, experientially and in our physical and mental abilities. If you are someone who needs accommodation during the interview process and/or in the workplace, please send a note along with your resume to [email protected] and we’ll be in touch.