Senior IC Layout Mask Designer (Contractor)

Posted 5 Days Ago
Be an Early Applicant
Billerica, MA
Expert/Leader
Artificial Intelligence • Internet of Things
The Role
The Senior IC Layout Mask Designer will lead the layout of high-performance analog cores in advanced CMOS processes. Responsibilities include setting up verification environments, designing layout for analog components, and following industry best practices for high-speed ICs across various process nodes.
Summary Generated by Built In

Senior layout designer (Contractor) will be responsible for layout of high performance analog cores such as analog-to-digital converters, digital-to-analog converters, PLL, transceivers, etc. Responsibilities include leading IC layout of cutting edge high performance, high speed CMOS integrated circuits in foundry CMOS process nodes in 5nm, 6nm, 7nm, 16nm, and 28nm following best practices from the industry. Job located at Omni's Billerica, MA office. Job requirements include the following qualifications.

Qualifications

  • Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
  • Must be able to set up LVS, DRC, ERC environments and debug verification issues using Cadence and Mentor tools.
  • Experience with layout of high performance analog blocks such as analog to digital converters, references, digital to analog converters, PLL etc. desired.
  • Experience with floor planning, block level routing and top level chip assembly.
  • Knowledge of high performance analog layout techniques such as common centroid layout, shielding, use of dummy devices, thermal aware layout with consideration for electromigration.
  • Demonstrated experience with analog layout for silicon chips in mass production.
  • Experience with FinFET process nodes preferred
  • Experience working with distributed design teams a plus.
  • Knowledge of skill code an layout automation a plus.
  • Self starter with the ability to define and adhere to a schedule.
  • Must possess strong written and verbal communication skills.
  • 10+ years experience in high performance analog layout in advanced CMOS process.

Top Skills

Cadence
Mentor
Synopsys
The Company
HQ: Milpitas, CA
69 Employees
On-site Workplace
Year Founded: 2015

What We Do

Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores in advanced FinFET nodes to 28nm, that enable differentiated systems-on-chip (SoCs) in applications ranging from 5G, wireline and optical communications, LiDAR, radar, networking, AI, image sensors, and IoT. Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few Msps to over 20 Gsps sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins, Colorado, Boston, Massachusetts and Bangalore, India.

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