Senior Engineer - ASIC Verification

Posted 3 Days Ago
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2 Locations
In-Office
Senior level
Artificial Intelligence • Machine Learning • Semiconductor • Design
The Role
Develop ASIC and chip-level verification environments using SystemVerilog, UVM, C/C++, and scripting. Create verification plans, tests, assertions, coverage models, regression automation, and debug workflows to achieve tapeout readiness. Collaborate with architects, designers, and system engineers while validating hardware, software, and industry-standard protocols. Experience with simulators, waveform/debug tools, formal verification, and processor platforms is valuable.
Summary Generated by Built In
Required skills:
Job Description:
· Develop verification testbench components for chip/module level using System Verilog, C/C++.
· Use Verification methodologies (Object oriented, UVM etc) to develop extendable test-bench/test-cases environment.
· Define and execute detailed verification plan from spec working with architects, designers, system engineers.
· Write tests, Debug tests, automate regression scripts and regression environment.
· Incorporate code-coverage, functional coverage, assertions, cover-groups etc to achieve 100% verification completeness prior to tapeout.
· Organized and creative thinker, motivated, and independent learner who can multitask in a dynamic environment, able to create and implement new solutions where required.
· Excellent debugging skills in both SW and ASIC hardware.
· Must be good in building verification environments preferably using Verilog, System Verilog, UVM, C/C++/PLI etc.
· Proficiency in scripting language like Perl, Tcl/Tk, Shell is a definite plus.
· Experience with simulators like ncVerilog (Incisive), VCS, Eldo and debug tools like Verdi/Debussy.
· Good understanding of latest formal verification techniques, assertions, properties is a plus.
· Understanding or prior experience with Industry standard protocols like USB/SPI/SATA/Ethernet/DisplayPort/SRIO/DDR/PCIE/DDR4/LPDDR4/DFI etc is a definite plus.
· Understanding or Prior Experience in ARM/Tensillica Processor platforms is a definite plus.
· Good written and oral communication skills. Ability to clearly document plans.
· ability to interface with different teams and prioritize work based on project needs.

Skills Required

  • Experience developing chip- or module-level verification testbench components
  • Proficiency with SystemVerilog and C/C++
  • Experience with object-oriented verification methodologies and UVM
  • Ability to define and execute verification plans from specifications
  • Experience writing, debugging, and automating test regressions
  • Experience with code coverage, functional coverage, assertions, and covergroups
  • Excellent software and ASIC hardware debugging skills
  • Experience building verification environments using Verilog, SystemVerilog, UVM, C/C++, or PLI
  • Good written and oral communication skills, including documenting plans
  • Ability to collaborate across teams and prioritize project work
  • Proficiency with Perl, Tcl/Tk, or Shell scripting
  • Experience with ncVerilog, Incisive, VCS, or Eldo simulators
  • Experience with Verdi or Debussy debug tools
  • Knowledge of formal verification techniques, assertions, and properties
  • Experience with USB, SPI, SATA, Ethernet, DisplayPort, SRIO, DDR, PCIe, DDR4, LPDDR4, or DFI protocols
  • Experience with ARM or Tensilica processor platforms
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The Company
HQ: Hyderabad
1,200 Employees
Year Founded: 1999

What We Do

Established in 1999, MosChip is the first fabless semiconductor company publicly traded in India with approximately 20 years of experience. MosChip is a semiconductor and system design company with a focus on turnkey ASICs, mixed signal IP and semiconductor, product engineering and IoT solutions catering to aerospace and defense, consumer electronics, automotive, medical and networking and telecommunications. Over the past two decades, MosChip has developed and shipped millions of ASIC connectivity ICs. MosChip’ s IoT solutions like smart lighting, smart metering and asset tracking are successfully deployed in volume.

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