About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
Responsibilities
DFT architecture definition
Understand SoC architecture and test requirements.
Work very closely with the lead Product/Test engineering throughout the DFT definition phase to determine efficient ways to optimize test cost and achieve high test coverage.
Drive and optimize DFT architecture for high performance and efficiency:
SCAN – scan partition, compression, at-speed, IR and low power
MBIST for memories
JTAG boundary scan insertion
Handle responsibilities pertaining to both block and top-level activities in Hierarchical Scan.
Implementation
Develop / Upgrade SCAN & MBIST Insertion flows
Develop appropriate timing constraints for SCAN/MBIST modes and debug timing violations
ATPG flow implementation catering to various fault models, test pattern generation
SCAN , MBIST & BSCAN Pattern Simulation
Solutions to test analog macros
Post-Silicon bring-up/support
Work with Evaluation/Test Engineering team to bring-up patterns on ATE
Work on failure analysis as required
Work with the Operation team on test cost and yield improvement
Improve DFT methodology to be in sync with latest best practices and technology in the industry
Work closely with physical design team throughout the development cycle.
Should be able to guide newly inducted team members on their bring-up on flow, methodology and execution methods in all aspects of DFT.
4-8 years of industry experience in DFT domain.
Must have experience in bringing atleast one or two products to successful production from architecture phase, scan implementation and simulations.
Must have hands-on experience working on post-silicon activities.
Having working experience with tessent DFT (SCAN, Mbist, Lbist, OCC, EDT, SSN, Boundary Scan) will be preferred.
Exceptional interpersonal and communication skills are critical for working, influencing and collaborating with product development groups and CAD tool teams spread across the globe.
Scripting skills in Perl/Python/TCL and a good command over HDLs.
Candidates with exposure to deep submicron effects and low power implementation using UPF/CPF will be at an advantage. Candidates with experience using Cadence digital implementation tools (Genus, Tempus) would be preferred.
Prior experience of timing closure/physical design will be an added plus.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
Skills Required
- 4-8 years of industry experience in DFT domain
- Experience bringing one or two products to production from architecture through scan implementation and simulation
- Hands-on experience with post-silicon activities
- Scripting skills in Perl, Python, and TCL
- Good command over HDLs
- Exceptional interpersonal and communication skills
- Working experience with Tessent DFT (SCAN, Mbist, Lbist, OCC, EDT, SSN, Boundary Scan)
- Exposure to deep submicron effects and low-power implementation using UPF/CPF
- Experience using Cadence digital implementation tools (Genus, Tempus)
- Prior experience of timing closure/physical design
Analog Devices Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Analog Devices and has not been reviewed or approved by Analog Devices.
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Retirement Support — The 401(k) program is described as a standout feature, with company contribution up to 8% of base salary and immediate vesting. This structure strengthens long-term value even when cash compensation perceptions vary.
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Healthcare Strength — Health coverage is positioned as comprehensive, including medical, dental, and vision options along with disability and life insurance. Day-one eligibility and multiple plan choices add to perceived robustness.
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Leave & Time Off Breadth — Paid time off appears broad, with vacation ranging from roughly 17–25 days and increasing up to five weeks with tenure, alongside sick time and paid holidays. Parental leave and related time-off provisions further expand coverage.
Analog Devices Insights
What We Do
Analog Devices, Inc. (NASDAQ: ADI) operates at the center of the modern digital economy, converting real-world phenomena into actionable insight with its comprehensive suite of analog and mixed signal, power management, radio frequency (RF), and digital and sensor technologies. ADI serves 125,000 customers worldwide with more than 75,000 products in the industrial, communications, automotive, and consumer markets. ADI is headquartered in Wilmington, MA.
