Senior Customer Support Engineer, Physical Design

Posted Yesterday
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Bengaluru, Bengaluru Urban, Karnataka, IND
In-Office
Senior level
Software
The Role
Provides senior technical support for complex semiconductor physical design issues from RTL synthesis through place-and-route and post-route signoff. Responsibilities include debugging EDA tool and implementation problems, optimizing power, performance, and area targets, developing reference flows and technical documentation, and communicating customer feedback to internal engineering and R&D teams.
Summary Generated by Built In
About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.  

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions.  Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. 

Are you ready?  

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

 

About the Role

We are seeking an experienced Senior Customer Support Engineer to provide deep technical expertise and resolve our customers' most complex Physical Design (PD) challenges. You will act as a critical technical escalation point and advisor. In this role, you will leverage your hands-on expertise in the RTL-to-GDSII flow to debug intricate implementation issues, recommend optimal PD recipes, and create robust reference documentation to ensure customer tape-out success.

Key Responsibilities

  • Technical Escalation & Debugging: Act as a senior technical escalation point for challenging customer issues, actively debugging and resolving complex physical design roadblocks spanning from synthesis to post-route closure.

  • Customer Guidance & Optimization: Collaborate with the broader support and account teams to provide expert-level guidance on Physical Design (PD) recipes, helping customers tailor their implementation strategies to meet specific Power, Performance, and Area (PPA) targets.

  • Documentation & Reference Design: Develop, maintain, and publish comprehensive user guides, application notes, and reference physical implementation flows to empower both customers and internal support teams.

  • Cross-Functional Collaboration: Work closely with customer support leadership to synthesize and relay critical technical feedback on tool and flow performance to internal R&D and platform engineering teams.

Required Qualifications

  • Education & Experience: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with 4+ years of relevant industry experience.

  • Physical Design Expertise: 4+ years of hands-on experience in the digital Physical Design flow, with a strong understanding of all stages from RTL synthesis through Place and Route (P&R) to post-route signoff.

  • Problem-Solving Skills: Exceptional analytical and debugging capabilities, with a proven track record of troubleshooting complex implementation and EDA tool issues.

  • Communication & Collaboration: Excellent verbal and written communication skills, with the ability to translate complex technical findings into clear, actionable guidance for internal stakeholders and external customers.

Preferred Qualifications

  • Application Engineering Background: Prior experience in an applications engineering or technical support role within the semiconductor or EDA industry.

  • Industry-Standard Tools: Hands-on experience with major industry-standard physical design and synthesis tools (e.g., Synopsys Fusion Compiler/ICC2, Cadence Innovus, or Genus).

  • Scripting: Proficiency in scripting languages (TCL, Python) to automate debugging processes, build workarounds, or analyze customer design databases.

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

India

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
  • 4+ years of relevant industry experience
  • 4+ years of hands-on experience in digital physical design, from RTL synthesis through place-and-route and post-route signoff
  • Strong analytical and debugging capabilities for complex implementation and EDA tool issues
  • Excellent verbal and written communication skills
  • Ability to translate complex technical findings into clear, actionable guidance
  • Applications engineering or technical support experience in the semiconductor or EDA industry
  • Hands-on experience with Synopsys Fusion Compiler, ICC2, Cadence Innovus, or Genus
  • Proficiency in TCL and Python scripting
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The Company
HQ: Santa Clara, CA
552 Employees
Year Founded: 2015

What We Do

The heart of SiFive is RISC-V! SiFive creates the building blocks of RISC-V-based IP that are the inevitable innovative reimagining of every computing platform.

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