The Role
We’re looking for a Senior Staff RFIC Design Engineer to join the core design team. You’ll design, simulate, and validate mmWave front-end circuit blocks for our next-generation beamformer chips—including LNAs, PAs, phase shifters, VGAs, and complete transceiver signal chains.
This is a senior technical role with significant design ownership. You’ll work directly with the founding engineers, contribute to architecture decisions, and see your designs go from schematic to silicon to customer products.
Responsibilities
- Design mmWave front-end circuit blocks (PAs, LNAs, phase shifters, VGAs, mixers) in advanced CMOS or RFSOI (SiGe and III-V processes are a plus).
- Perform transistor-level schematic design, simulation, and optimization using Cadence Virtuoso (Spectre, ADE).
- Conduct full-custom IC layout or direct layout engineers, ensuring DRC/LVS-clean designs at mmWave frequencies.
- Perform post-layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to validate performance through parasitics.
- Collaborate on chip-level architecture and system partitioning for multi-channel beamformer ICs.
- Support silicon bring-up, bench characterization, and debugging of fabricated chips.
- Contribute to tapeout preparation, design reviews, and documentation.
- Mentor junior RFIC designers and contribute to a culture of technical excellence.
Required Qualifications
- MS + 5 years industry experience or PhD + 2 years industry experience in Electrical Engineering with a focus on RF/mmWave IC design.
- Demonstrated expertise in at least two of: PA, LNA, phase shifter, VGA, mixer, or frequency multiplier design at mmWave frequencies.
- Expert proficiency with Cadence EDA suite (Virtuoso, ADE, and Layout) and EM simulation tools (Ansys HFSS, EMX, or ADS Momentum).
- Experience with at least one full tapeout cycle: schematic to layout to fabrication to bring-up to characterization.
- Strong understanding of mmWave transmission line theory, matching networks, and on-chip passive design.
- Track record of published work or shipped products demonstrating circuit design excellence.
Preferred Qualifications
- Experience with phased array or multi-channel beamformer IC design.
- Background in SATCOM, 5G NR FR2, or automotive radar mmWave applications.
- Experience in SOI nodes with high resistivity substrates.
- Familiar with system-level RF specs: EVM, P1dB, noise figure, IP3, EIRP, and G/T.
- Experience in a startup or small-team environment with high design ownership.
- Strong communication skills and ability to present design tradeoffs clearly.
Skills Required
- MS in Electrical Engineering with 5 years of industry experience, or PhD in Electrical Engineering with 2 years of industry experience
- Focus on RF/mmWave IC design
- Expertise in at least two of PA, LNA, phase shifter, VGA, mixer, or frequency multiplier design at mmWave frequencies
- Expert proficiency with Cadence Virtuoso, ADE, Layout, and EM simulation tools such as Ansys HFSS, EMX, or ADS Momentum
- Experience with at least one complete tapeout cycle from schematic through fabrication, bring-up, and characterization
- Strong understanding of mmWave transmission line theory, matching networks, and on-chip passive design
- Published work or shipped products demonstrating circuit design excellence
- Experience with phased arrays or multi-channel beamformer IC design
- Background in SATCOM, 5G NR FR2, or automotive radar mmWave applications
- Experience with SOI nodes using high-resistivity substrates
- Familiarity with system-level RF specifications including EVM, P1dB, noise figure, IP3, EIRP, and G/T
- Experience in a startup or small-team environment with high design ownership
- Strong communication skills and ability to present design tradeoffs clearly
What We Do
Oso Semiconductor is a fabless semiconductor company developing high-performance beamforming chipsets and ultra-low-loss RFIC technology for electrically steered, phased-array antennas. Its products target wireless communication and sensing applications, including satellite communications, 5G/6G, radar, and defense. The company’s architecture is designed to reduce power, size, weight, and cost while improving interference resilience and enabling more capable, compact phased-array systems across commercial and mission-critical markets.
