PE Package Engineering

Posted 2 Days Ago
Be an Early Applicant
2 Locations
Hybrid
129K-239K Annually
Senior level
Big Data • Internet of Things • Software
The Role
Leads semiconductor package development from chip-package co-design through qualification and high-volume manufacturing ramp. Develops package solutions across flip-chip, wafer-level, leadframe, and organic laminate technologies; translates electrical, thermal, mechanical, reliability, manufacturing, and cost requirements into designs. Collaborates with engineering teams, OSATs, suppliers, and quality organizations; manages design reviews, qualification, risk mitigation, simulations, supplier engagement, and package technology roadmaps.
Summary Generated by Built In
Overview

Rambus, a leading provider of semiconductor products and silicon IP that make data faster and safer, is seeking an exceptional Principal Package Development Engineer to join our Package Engineering team in San Jose, California. In this role, you will collaborate with accomplished engineers and cross-functional teams to develop high-performance semiconductor products for data-intensive applications.


This full-time position reports to the Director of Package Engineering. You will lead package development activities from early product definition and chip-package co-design through qualification and manufacturing ramp. Your work will focus on enabling reliable, high-yield, cost-effective, and low-defect production across multiple package technologies.


You will collaborate with internal engineering teams, outsourced semiconductor assembly and test providers, and material and component suppliers to ensure package performance, qualification, and manufacturing readiness across the Rambus product portfolio.

Rambus offers a flexible, hybrid work environment for most office-based roles. Employees are encouraged to work onsite an average of at least three days per week, with up to two days of remote work.

Responsibilities
  • Lead early chip-package co-design and package technology selection for new products.
  • Develop package solutions across technologies including FCCSP, FCBGA, FCQFN, WLCSP, QFN, and related package platforms.
  • Translate product, die, electrical, thermal, mechanical, reliability, manufacturing, and cost requirements into executable package designs.
  • Partner with Chip Design, SI/PI, Product Engineering, Test, Quality, Reliability, Marketing, Supply Chain, and other cross-functional teams throughout the product development lifecycle.
  • Evaluate package architecture and material options against performance, cost, manufacturability, yield, reliability, and schedule requirements.
  • Lead technical engagement with OSAT partners and substrate, leadframe, and material suppliers through design reviews, development builds, qualification, and production ramp.
  • Review package drawings, substrate and leadframe designs, material selections, design rules, and supplier manufacturing requirements.
  • Identify package-related technical risks and drive mitigation plans, root-cause investigations, and corrective actions.
  • Support thermo-mechanical modeling and simulation activities, including model development, boundary-condition definition, correlation, and interpretation of results.
  • Drive package qualification planning and execution in collaboration with Quality and Reliability Engineering.
  • Support successful transfer of new package technologies and products into high-volume manufacturing.
  • Improve package-development workflows, design methodologies, supplier engagement models, and technology roadmaps.
  • Document technical decisions, design requirements, development results, risks, and lessons learned.
Qualifications
  • Bachelor’s degree in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, or a related technical discipline.
  • At least seven years of semiconductor package development experience, including direct involvement in new product introduction and manufacturing ramp.
  • Demonstrated experience developing multiple semiconductor package types and successfully transitioning products into volume production.
  • Working knowledge of flip-chip, wire-bond, wafer-level, leadframe-based, and organic laminate package technologies.
  • Experience with high-speed or high-pin-count semiconductor devices.
  • Understanding of signal integrity, power integrity, thermal, mechanical, and reliability considerations in package development.
  • Strong knowledge of organic substrate and leadframe design, materials, fabrication processes, and manufacturing capabilities.
  • Experience working directly with OSAT partners and package-component or material suppliers.
  • Understanding of package-material properties and their impact on manufacturing and reliability.
  • Experience with relevant package qualification and reliability methods, including temperature cycling, HAST, mechanical shock, vibration, thermal characterization, and outgassing assessment.
  • Working knowledge of applicable JEDEC standards and package-design specifications.
  • Strong analytical, problem-solving, project-management, and technical communication skills.
  • Demonstrated ability to lead technical activities across cross-functional and globally distributed teams.

Preferred Qualifications

 

  • Master’s degree or Ph.D. in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, or a related discipline.
  • Experience with advanced silicon nodes and complex, high-performance package architectures.
  • Experience using Cadence Allegro Package Designer and AutoCAD.
  • Experience with thermal or thermo-mechanical simulation tools and model correlation.
  • Familiarity with package warpage, interconnect fatigue, delamination, moisture sensitivity, material adhesion, and other package-level reliability mechanisms.
  • Experience developing or qualifying package materials, including substrates, leadframes, mold compounds, underfills, die-attach materials, and solder interconnects.
  • Experience establishing package technology roadmaps, supplier design rules, or standardized package-development processes.

About Rambus


Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.


Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.


The US salary range for this full-time position is $128,700 to $239,100. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.


Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.


Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.


Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.


For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.



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Skills Required

  • Bachelor's degree in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, or a related technical discipline.
  • At least seven years of semiconductor package development experience, including new product introduction and manufacturing ramp.
  • Experience developing multiple semiconductor package types and transitioning products into volume production.
  • Working knowledge of flip-chip, wire-bond, wafer-level, leadframe-based, and organic laminate package technologies.
  • Experience with high-speed or high-pin-count semiconductor devices.
  • Understanding of signal integrity, power integrity, thermal, mechanical, and reliability considerations in package development.
  • Strong knowledge of organic substrate and leadframe design, materials, fabrication processes, and manufacturing capabilities.
  • Experience working directly with OSAT partners and package-component or material suppliers.
  • Understanding of package-material properties and their impact on manufacturing and reliability.
  • Experience with package qualification and reliability methods, including temperature cycling, HAST, mechanical shock, vibration, thermal characterization, and outgassing assessment.
  • Working knowledge of applicable JEDEC standards and package-design specifications.
  • Strong analytical, problem-solving, project-management, and technical communication skills.
  • Ability to lead technical activities across cross-functional and globally distributed teams.
  • Master's degree or Ph.D. in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, or a related discipline.
  • Experience with advanced silicon nodes and complex, high-performance package architectures.
  • Experience using Cadence Allegro Package Designer and AutoCAD.
  • Experience with thermal or thermo-mechanical simulation tools and model correlation.
  • Familiarity with package warpage, interconnect fatigue, delamination, moisture sensitivity, material adhesion, and other package-level reliability mechanisms.
  • Experience developing or qualifying package materials, including substrates, leadframes, mold compounds, underfills, die-attach materials, and solder interconnects.
  • Experience establishing package technology roadmaps, supplier design rules, or standardized package-development processes.
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The Company
HQ: San Jose, CA
989 Employees

What We Do

Dedicated to making data faster and safer, Rambus creates innovative hardware, software and services that drive technology advancements from the data center to the mobile edge. Our architecture licenses, IP cores, chips, software, and services span memory and interfaces, security, and emerging technologies to positively impact the modern world. We collaborate with the industry, partnering with leading chip and system designers, foundries, and service providers. Integrated into tens of billions of devices and systems, our products and technologies power and secure diverse applications, including Big Data, Internet of Things (IoT) security and much more!

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