A 6-month internship starting in 2025 - For students in their last University, Engineering schools (computer science, electronics, embedded systems).
Candidates must have the right to study and work in France.
Locations: Villeneuve-Loubet, France. Hybrid work allowed.
ObjectiveTo develop formal verification IP based on a new methodology to test Codasip RISC-V IPs.
BackgroundFormal methods are used for CPU verification at Codasip. We have several extensions in consideration to improve the verification performances and extend its scope.
As our intern, you will be responsible for analyzing these proposals, selecting one or two, and implementing them as new tools or verification components. They will then be applied to real RISC-V CPUs.
Desirable outputs- An implementation of the methodologies on a suitable Codasip RISC-V IP.
- An analysis of respective performance, in terms of:
- Ability to identify bugs (artificially injected and perhaps real).
- Achievable depth of bug-free confidence.
- Some reusable verification IPs, including drivers and formal test benches.
You are our ideal candidate if you have:
- Knowledge of Verilog or SystemVerilog (or similar HDL) and experience writing synthesizable RTL.
- An understanding of RISC-V or other CPU microarchitecture.
- A solid foundation in mathematical logic.
- Experience with shell, Tcl, Python, or other scripting languages.
- Familiarity working with Linux-based operating systems.
- Demonstrable experience undertaking self-led research or project work.
- Good communication skills and the ability to clearly summarise and share technical information and experimental results.
You may also have:
- Experience with linear temporal logic or SystemVerilog Assertions.
- Specific experience with formal verification tools and techniques such as bounded model checking, sequential equivalence checking, SAT/SMT solvers, etc.
We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high-performance supercomputers and next-generation embedded systems. By also providing our own automated proprietary tools to fully customize these cores, we give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.
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What We Do
Codasip is a processor solutions company which helps developers to differentiate their products. We are Europe’s leading RISC-V company with a global presence. Billions of chips already use our technology.
In today’s technology market, differentiation is everything. The difference between success and failure. And, in chip design, this difference is quite literally wafer thin. With increasing transistor costs, your developers can no longer rely on semiconductor scaling and legacy processors to achieve your goals. The only way forward is to implement custom compute with designs tailored to your applications.
We deliver custom compute through the combination of the open RISC-V ISA, Codasip Studio processor design automation and high-quality processor IP. Our innovative approach lets you easily customize and differentiate your designs. You can develop high-performing, and game-changing products that are truly transformational.
Founding member of RISC-V International.
Founding member of the CHERI Alliance.
