Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain.
Intel Foundry will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's. Foundry Services will also provide access to package design services to help our customers seamlessly turn silicon into solutions, using industry standard and advance design packages. Come join us and do something wonderful.
Intel's Foundry Technology Manufacturing (FTM) Advanced Packaging Technology and Manufacturing (APTM) group is seeking a talented and motivatedCAD/EDA Tools Software Engineerto join our growing engineering team. In this role, you will have a unique opportunity to collaborate directly with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide. You play a pivotal role in design, develop, test, and debug software tools, improve design flows, and methodologies used across internal and Foundry package design teams. You will work closely with design engineers, CAD teams, infrastructure partners, and tool vendors to improve engineering productivity and implement scalable solutions that improve the overall user experience and design efficiency.
The ideal candidate has strong expertise in Cadence Advance Package Design (APD) tools, Skill, and large-scale automation using industry-standard package design tools.
Key Responsibilities
- Troubleshoot and resolve user issues related to Electronic Design Automation (EDA) tools, internal automation, engineering environments, infrastructure, and design flow execution.
- Partner with engineering teams to gather requirements, identify pain points, and drive continuous design flow improvements, and new feature deployments.
- Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to resolve technical issues, define and implement new tool features and requirements.
- Develop technical documentation, user guides, and best-known methods (BKMs) to improve design efficiencies, flow, and package design methodologies.
- Excellent communication and customer support skills.
- Effectively with diverse engineering, design teams, and a large end-user community.
- Build and execute test cases for debugging, validation, and tool signoffs.
- Create and verify unique package designs, integrating components into hierarchical systems to support end-to-end EDA tool testing for advanced technologies.
Core Competencies
- Customer-oriented attitude and mindset.
- Self-driven and results-oriented, capable of effectively working multiple tasks.
- Team player - effective team-work skillset to drive and find solutions for customer design implementation issues/challenges.
- Analytical problem-solving skills.
- Effective communication skills, as well as experience in collaboration, listening and providing feedback.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship
Minimum Qualifications
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, Software Development, Software Engineering, or a STEM-related field.
- 4+ years of experience in:
- IC digital design, package design, or EDA tools.
- EDA tools from vendors such as Cadence, Synopsys, or Siemens, including tools like Cadence Virtuoso, Innovus, Synopsys 3DIC Compiler, Siemens Calibre, or others.
- Scripting languages such as Python, TCL, SKILL, VBScript, or Perl to automate workflows.
- Interfacing with customers and stakeholders to analyze design challenges or define functional specifications for EDA vendors.
Preferred Qualifications
- Master's degree in Computer Science, Electrical Engineering, or a related STEM field.
- 6+ years of experience in IC digital design, package design, or EDA tools.
- Experience with computational geometry, silicon or assembly processes, or test and characterization techniques.
- Experience with large SoC or multi-die package design implementation flows
- Experience scripting and automation skills in EDA environments
- Experience supporting Design Automation, CAD, or package design environments
- Demonstrated ability to lead cross-functional infrastructure and automation improvement initiatives
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $149,600.00-211,200.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, Software Development, Software Engineering, or a STEM-related field
- At least 4 years of experience in IC digital design, package design, or EDA tools
- Experience with EDA tools from Cadence, Synopsys, Siemens, or similar vendors
- Experience with scripting languages such as Python, TCL, SKILL, VBScript, or Perl
- Experience interfacing with customers and stakeholders to analyze design challenges or define EDA vendor specifications
- Master's degree in Computer Science, Electrical Engineering, or a related STEM field
- At least 6 years of experience in IC digital design, package design, or EDA tools
- Experience with computational geometry, silicon or assembly processes, or test and characterization techniques
- Experience with large SoC or multi-die package design implementation flows
- Experience supporting Design Automation, CAD, or package design environments
- Ability to lead cross-functional infrastructure and automation improvement initiatives
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
Intel Insights
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