Digital Design RTL Engineer

Reposted 2 Months Ago
Be an Early Applicant
2 Locations
In-Office
122K-195K Annually
Senior level
Software • Semiconductor • Manufacturing
The Role
Design and deliver high-quality SystemVerilog RTL for advanced-node SoCs (5nm and below). Optimize PPA, perform CDC/RDC analysis and low-power design, drive timing closure and physical-design handoff, and collaborate with Architecture, Verification, and Physical Design teams. Work spans specification through tapeout readiness.
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Job Description:

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical execution, you will collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule. 

Responsibilities include:

  • Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off

  • Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule

  • High proficiency in SystemVerilog

  • Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques.

Experience:

  • BSEE required, MSEE/PHD preferred

  • 8+ years of industry experience with a focus on SoC integration, LPDDR5/6, DDR4/5 and/or high-speed SerDes, or HBM protocols is highly preferred.


Compensation and Benefits


The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • High proficiency in SystemVerilog
  • Proven track record delivering SystemVerilog RTL in advanced process nodes (5nm and below)
  • Deep understanding of PPA optimization
  • Deep understanding of Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) analysis
  • Low-power design techniques
  • Ability to take designs from specification through timing closure and physical design hand-off
  • BSEE degree
  • MSEE or PhD
  • 8+ years industry experience
  • Experience with SoC integration and high-speed protocols (LPDDR5/6, DDR4/5, SerDes, HBM)
  • Cross-functional collaboration with Architecture, Verification, and Physical Design teams

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility — Equity grants, including RSUs, stock refreshers, and an ESPP, are often described as top-tier and a primary driver of strong total compensation, especially for technical and senior roles. Once stock begins vesting, overall pay is commonly viewed as hard for other employers to match.
  • Retirement Support — A 401(k) match of 100% up to 6% with immediate vesting is frequently highlighted as a standout benefit. This structure provides strong long-term savings support.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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