ASIC Emulation Engineer

Role: ASIC/SoC Emulation Engineer
Location: Santa Clara, CA (Onsite)
Type: Contract
Interview: Phone/Skype

Job Overview:
We are seeking a skilled ASIC Emulation Engineer to lead the development and deployment of pre-silicon validation platforms. This hands-on role involves building emulation testbenches, debugging complex SoC interfaces, and optimizing performance across RTL-to-emulator flows using cutting-edge tools like Palladium, Protium, and ZeBu.

Core Responsibilities:

• Build emulation testbenches using SystemVerilog and C/C++
• Develop and maintain RTL-based emulation/prototyping models
• Lead debug workflows and bring-up of interfaces like PCIe and DDR
• Drive emulation strategies and tool integration with validation, SW, and verification teams
• Collaborate with vendors on emerging emulation capabilities
• Conduct system debug, post-silicon validation support, and data analysis

Mandatory Skills:
#PalladiumTools (5)
#Protium (5)
#ZeBu (5)
#SystemVerilog (3)
#Cplusplus (3)
#PythonScripting (3)

Optional Skills:
#DeepDebug #RTLModeling #PostSiliconBringup #SoCValidation #TCL

All your information will be kept confidential according to EEO guidelines.